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authorYangbo Lu <yangbo.lu@nxp.com>2016-05-12 19:12:58 +0800
committerYork Sun <york.sun@nxp.com>2016-06-03 14:12:05 -0700
commitcc634e283659096e792f9515e6a9268b58179954 (patch)
tree2d67373f2467bd0e6f4a7f61e4648dcc0bbe48c7 /drivers/mmc
parente04f9d0c2f5dec275eb550317c6bad2d8bbfb209 (diff)
mmc: fsl_esdhc: fix check_and_invalidate_dcache_range function
In function check_and_invalidate_dcache_range(), there are incorrect start address and end address of the dcache range calculated for Layerscape platforms. This patch is to fix this issue. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/fsl_esdhc.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3acf9e8820..57ad9754f5 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -308,14 +308,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
static void check_and_invalidate_dcache_range
(struct mmc_cmd *cmd,
struct mmc_data *data) {
-#ifdef CONFIG_FSL_LAYERSCAPE
unsigned start = 0;
-#else
- unsigned start = (unsigned)data->dest ;
-#endif
+ unsigned end = 0;
unsigned size = roundup(ARCH_DMA_MINALIGN,
data->blocks*data->blocksize);
- unsigned end = start+size ;
#ifdef CONFIG_FSL_LAYERSCAPE
dma_addr_t addr;
@@ -324,7 +320,10 @@ static void check_and_invalidate_dcache_range
printf("Error found for upper 32 bits\n");
else
start = lower_32_bits(addr);
+#else
+ start = (unsigned)data->dest;
#endif
+ end = start + size;
invalidate_dcache_range(start, end);
}