diff options
author | Mike Frysinger <vapier@gentoo.org> | 2009-05-25 22:42:28 -0400 |
---|---|---|
committer | Scott Wood <scottwood@freescale.com> | 2009-07-07 17:58:04 -0500 |
commit | cd84423a09f3a08029fe41c1db96168debd0b51f (patch) | |
tree | 877f8cda0130e3645a24aaf03c267117fa940abc /drivers/mtd/nand/nand_plat.c | |
parent | d27bc728cf35e7d7996fbd77154335e66615b213 (diff) |
mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped. Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/nand_plat.c')
-rw-r--r-- | drivers/mtd/nand/nand_plat.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_plat.c b/drivers/mtd/nand/nand_plat.c new file mode 100644 index 0000000000..b35492b9fc --- /dev/null +++ b/drivers/mtd/nand/nand_plat.c @@ -0,0 +1,53 @@ +/* + * Genericish driver for memory mapped NAND devices + * + * Copyright (c) 2006-2009 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +/* Your board must implement the following macros: + * NAND_PLAT_WRITE_CMD(chip, cmd) + * NAND_PLAT_WRITE_ADR(chip, cmd) + * NAND_PLAT_INIT() + * + * It may also implement the following: + * NAND_PLAT_DEV_READY(chip) + */ + +#include <common.h> +#include <asm/io.h> + +#include <nand.h> + +static void plat_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (cmd == NAND_CMD_NONE) + return; + + if (ctrl & NAND_CLE) + NAND_PLAT_WRITE_CMD(this, cmd); + else + NAND_PLAT_WRITE_ADR(this, cmd); +} + +#ifdef NAND_PLAT_DEV_READY +static int plat_dev_ready(struct mtd_info *mtd) +{ + return NAND_PLAT_DEV_READY((struct nand_chip *)mtd->priv); +} +#else +# define plat_dev_ready NULL +#endif + +int board_nand_init(struct nand_chip *nand) +{ + NAND_PLAT_INIT(); + + nand->cmd_ctrl = plat_cmd_ctrl; + nand->dev_ready = plat_dev_ready; + nand->ecc.mode = NAND_ECC_SOFT; + + return 0; +} |