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authorPatrick Delaunay <patrick.delaunay@st.com>2018-06-27 10:15:33 +0200
committerTom Rini <trini@konsulko.com>2018-07-19 16:31:35 -0400
commit7d118161bbfbeb21ff2f6bf8ccc3cc0a8dd6ddc6 (patch)
tree818cf8221f8ebb8175308f51f83c33f979c24014 /drivers/mtd/nand
parent14acea0244e33c4522fa3ea774bb3e76fa9e4fb4 (diff)
mmc: stm32_sdmmc2: update pwron management
Correctly manage the SDMMC reset and card cycle power to fully handle the power cycle added in the MMC uclass and avoid issue with level-shifter with some uSDCARD. 3 states managed in driver: 1/ reset: SDMMC disable, signal HiZ 2/ power-cycle: SDMMC disable, signals drive to 0 3/ power-on: SDMMC enabled Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'drivers/mtd/nand')
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