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authorMarek Vasut <marex@denx.de>2018-08-13 19:32:14 +0200
committerMarek Vasut <marex@denx.de>2018-08-13 22:35:42 +0200
commit215a06565a701c92e7f6918b7488d949d59c1d50 (patch)
tree32893f683d65218ff33b42f182d4bc2f6c156b99 /drivers/net/Kconfig
parentf9edeb32a9dcf23571ab2ae076be9ad1c61d06fa (diff)
net: designware: socfpga: Add Arria10 extras
Add wrapper around the designware MAC driver to handle the SoCFPGA specific configuration bits. On Arria10, this is configuration of syscon phy_intf. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net/Kconfig')
-rw-r--r--drivers/net/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index f762b0898d..d86da7760e 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -150,6 +150,14 @@ config ETH_DESIGNWARE
100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
provide the PHY (physical media interface).
+config ETH_DESIGNWARE_SOCFPGA
+ bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC"
+ depends on DM_ETH && ETH_DESIGNWARE
+ help
+ The Altera SoCFPGA requires additional configuration of the
+ Altera system manager to correctly interface with the PHY.
+ This code handles those SoC specifics.
+
config ETHOC
bool "OpenCores 10/100 Mbps Ethernet MAC"
help