diff options
author | York Sun <york.sun@nxp.com> | 2017-10-17 08:00:21 -0700 |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2017-10-23 14:02:48 -0700 |
commit | 1e0d51a6c4cdd22a75abbdf392484c66ff8a91ea (patch) | |
tree | 39ffac198d3a9d03761940968c6b3d4591d48c4e /drivers/net/fsl-mc/mc.c | |
parent | ce0dea889a01d06bdc2d845fd03e90bcf8b49fec (diff) |
powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores
Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/net/fsl-mc/mc.c')
0 files changed, 0 insertions, 0 deletions