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authorSiva Durga Prasad Paladugu <sivadur@xilinx.com>2017-01-06 16:18:50 +0530
committerMichal Simek <michal.simek@xilinx.com>2017-11-28 16:09:27 +0100
commitd02a0b1fdf6ba3197e0b46f8a8f52e3c5d375506 (patch)
tree71aceba285efbbb704206e73324c2d20a9637044 /drivers/net/xilinx_axi_emac.c
parent70c42b4ca4482e1bb8eac7c56c065e6ecbe5f244 (diff)
net: xilinx_axi_emac: Use wait_for_bit instead of while loop
Use wait_for_bit instead while loop during init Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Diffstat (limited to 'drivers/net/xilinx_axi_emac.c')
-rw-r--r--drivers/net/xilinx_axi_emac.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 25c66c6098..ea79b7420a 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -14,6 +14,7 @@
#include <asm/io.h>
#include <phy.h>
#include <miiphy.h>
+#include <wait_bit.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -350,7 +351,7 @@ static void axiemac_stop(struct udevice *dev)
static int axi_ethernet_init(struct axidma_priv *priv)
{
struct axi_regs *regs = priv->iobase;
- u32 timeout = 200;
+ int err;
/*
* Check the status of the MgtRdy bit in the interrupt status
@@ -359,11 +360,9 @@ static int axi_ethernet_init(struct axidma_priv *priv)
* will be valid until this bit is valid.
* The bit is always a 1 for all other PHY interfaces.
*/
- while (timeout && (!(in_be32(&regs->is) & XAE_INT_MGTRDY_MASK))) {
- timeout--;
- udelay(1);
- }
- if (!timeout) {
+ err = wait_for_bit(__func__, (const u32 *)&regs->is,
+ XAE_INT_MGTRDY_MASK, true, 200, false);
+ if (err) {
printf("%s: Timeout\n", __func__);
return 1;
}