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authorEric Bénard <eric@eukrea.com>2010-06-21 09:40:43 +0200
committerBen Warren <biggerbadderben@gmail.com>2010-07-12 00:14:29 -0700
commit836cd453583627cbef784bd4d7963109d5914bde (patch)
tree0f17601188fa2d0f218fecb90a5c956c5da7b432 /drivers/net
parent409943a98961661fd93fb055a3d302184901dda5 (diff)
cpuat91: unbreak ethernet
* the following problems are met : config was set to use the new driver as a default but - RMII was not enabled for the new driver - the new driver didn't compile with RMII enabled - the new driver initialize a PHY at address O when the PHY of this board is at 1 thus we get "AT91 EMAC RMII: No PHY present" * to fix these problems, this patch : - enable RMII for the new driver - fix the wrong define used in the at91_emac.c - allow the config file to set a default phy address (and use 0 as a default as in the actual at91_emac.c driver) Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/at91_emac.c32
1 files changed, 22 insertions, 10 deletions
diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c
index fa72e2cabd..245da121b9 100644
--- a/drivers/net/at91_emac.c
+++ b/drivers/net/at91_emac.c
@@ -53,6 +53,10 @@
Please decrease the CONFIG_SYS_RX_ETH_BUFFER value
#endif
+#ifndef CONFIG_DRIVER_AT91EMAC_PHYADDR
+#define CONFIG_DRIVER_AT91EMAC_PHYADDR 0
+#endif
+
/* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
#if (AT91C_MASTER_CLOCK > 80000000)
#define HCLK_DIV AT91_EMAC_CFG_MCLK_64
@@ -198,12 +202,15 @@ static int at91emac_phy_reset(struct eth_device *netdev)
emac = (at91_emac_t *) netdev->iobase;
adv = ADVERTISE_CSMA | ADVERTISE_ALL;
- at91emac_write(emac, 0, MII_ADVERTISE, adv);
+ at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_ADVERTISE, adv);
VERBOSEP("%s: Starting autonegotiation...\n", netdev->name);
- at91emac_write(emac, 0, MII_BMCR, (BMCR_ANENABLE | BMCR_ANRESTART));
+ at91emac_write(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMCR,
+ (BMCR_ANENABLE | BMCR_ANRESTART));
for (i = 0; i < 100000 / 100; i++) {
- at91emac_read(emac, 0, MII_BMSR, &status);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_BMSR, &status);
if (status & BMSR_ANEGCOMPLETE)
break;
udelay(100);
@@ -229,13 +236,15 @@ static int at91emac_phy_init(struct eth_device *netdev)
emac = (at91_emac_t *) netdev->iobase;
/* Check if the PHY is up to snuff... */
- at91emac_read(emac, 0, MII_PHYSID1, &phy_id);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_PHYSID1, &phy_id);
if (phy_id == 0xffff) {
printf("%s: No PHY present\n", netdev->name);
return 1;
}
- at91emac_read(emac, 0, MII_BMSR, &status);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_BMSR, &status);
if (!(status & BMSR_LSTATUS)) {
/* Try to re-negotiate if we don't have link already. */
@@ -243,7 +252,8 @@ static int at91emac_phy_init(struct eth_device *netdev)
return 2;
for (i = 0; i < 100000 / 100; i++) {
- at91emac_read(emac, 0, MII_BMSR, &status);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_BMSR, &status);
if (status & BMSR_LSTATUS)
break;
udelay(100);
@@ -253,8 +263,10 @@ static int at91emac_phy_init(struct eth_device *netdev)
VERBOSEP("%s: link down\n", netdev->name);
return 3;
} else {
- at91emac_read(emac, 0, MII_ADVERTISE, &adv);
- at91emac_read(emac, 0, MII_LPA, &lpa);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_ADVERTISE, &adv);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR,
+ MII_LPA, &lpa);
media = mii_nway_result(lpa & adv);
speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
? 1 : 0);
@@ -271,7 +283,7 @@ int at91emac_UpdateLinkSpeed(at91_emac_t *emac)
{
unsigned short stat1;
- at91emac_read(emac, 0, MII_BMSR, &stat1);
+ at91emac_read(emac, CONFIG_DRIVER_AT91EMAC_PHYADDR, MII_BMSR, &stat1);
if (!(stat1 & BMSR_LSTATUS)) /* link status up? */
return 1;
@@ -364,7 +376,7 @@ static int at91emac_init(struct eth_device *netdev, bd_t *bd)
value = AT91_EMAC_CFG_CAF | AT91_EMAC_CFG_NBC |
HCLK_DIV;
#ifdef CONFIG_RMII
- value |= AT91C_EMAC_RMII;
+ value |= AT91_EMAC_CFG_RMII;
#endif
writel(value, &emac->cfg);