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authorBaruch Siach <baruch@tkos.co.il>2019-02-03 15:15:39 +0200
committerStefan Roese <sr@denx.de>2019-02-11 09:39:12 +0100
commit6664a0e5f3694592966c92ec4a0547ad77b84a9a (patch)
treebd87330a44eaac35afa15e14906d6bfc0f1d016a /drivers/pci/pcie_dw_mvebu.c
parentf301ba55c877707e15378401247cc828740ba00e (diff)
pcie: designware: mvebu: fix reset release polarity
The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value. Reported-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci/pcie_dw_mvebu.c')
-rw-r--r--drivers/pci/pcie_dw_mvebu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index 8081005c27..95fb41966f 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -489,7 +489,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev)
* using this GPIO.
*/
if (dm_gpio_is_valid(&reset_gpio)) {
- dm_gpio_set_value(&reset_gpio, 1);
+ dm_gpio_set_value(&reset_gpio, 1); /* assert */
+ mdelay(200);
+ dm_gpio_set_value(&reset_gpio, 0); /* de-assert */
mdelay(200);
}
#else