summaryrefslogtreecommitdiff
path: root/drivers/phy/marvell/comphy_a3700.c
diff options
context:
space:
mode:
authorMarek BehĂșn <marek.behun@nic.cz>2018-04-24 17:21:24 +0200
committerStefan Roese <sr@denx.de>2018-05-14 10:00:15 +0200
commit7288182aa6c11e4b0b2783cd4c7762f93f12cb64 (patch)
treedf5b8db97170a612024626fbf3eae42030591384 /drivers/phy/marvell/comphy_a3700.c
parent22f418935be4f5c6de26d2563a61d68136d80586 (diff)
phy: marvell: a3700: Save/restore selector reg in SGMII init
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting the PHY. Since comphy_mux already set the selector register to correct values, we have to store it's value before setting it to 0 and restore it after SGMII init. Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/phy/marvell/comphy_a3700.c')
-rw-r--r--drivers/phy/marvell/comphy_a3700.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index bf68f5d6be..50167a69af 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -697,13 +697,15 @@ static void comphy_sgmii_phy_init(u32 lane, u32 speed)
static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert)
{
int ret;
+ u32 saved_selector;
debug_enter();
/*
* 1. Configure PHY to SATA/SAS mode by setting pin PIN_PIPE_SEL=0
*/
- reg_set(COMPHY_SEL_ADDR, 0, rf_compy_select(lane));
+ saved_selector = readl(COMPHY_SEL_ADDR);
+ reg_set(COMPHY_SEL_ADDR, 0, 0xFFFFFFFF);
/*
* 2. Reset PHY by setting PHY input port PIN_RESET=1.
@@ -874,6 +876,11 @@ static int comphy_sgmii_power_up(u32 lane, u32 speed, u32 invert)
if (!ret)
printf("Failed to init RX of SGMII PHY %d\n", lane);
+ /*
+ * Restore saved selector.
+ */
+ reg_set(COMPHY_SEL_ADDR, saved_selector, 0xFFFFFFFF);
+
debug_exit();
return ret;