diff options
| author | Vignesh Raghavendra <vigneshr@ti.com> | 2019-12-09 10:25:33 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2020-01-20 10:10:28 +0530 |
| commit | 9d32a94bce5e5a184eff0fbef860c1bbc87cd3a0 (patch) | |
| tree | 8b1b5c2795d425d974ea899551d3111a85a37260 /drivers/pinctrl/ath79 | |
| parent | a8837cf43839394fb16d6033641181e2309c8c2b (diff) | |
soc: ti: k3-navss-ringacc: Flush/invalidate caches on ring push/pop
Flush caches when pushing an element to ring and invalidate caches when
popping an element from ring in Exposed Ring mode. Otherwise DMA
transfers don't work properly in R5 SPL (with caches enabled) where the
core is not in coherency domain.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'drivers/pinctrl/ath79')
0 files changed, 0 insertions, 0 deletions