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authorSjoerd Simons <sjoerd.simons@collabora.co.uk>2016-02-28 22:24:58 +0100
committerSimon Glass <sjg@chromium.org>2016-05-27 09:00:48 -0600
commit70f7a2cdac6a7f75f27848d689a13ca244b0792b (patch)
tree7db9491db21a325a1af85c89d7c2ca37b5b3ed97 /drivers/pinctrl/rockchip
parent90b7fc924adfe7f1745dcf6a1dabb9e77aa762a7 (diff)
rockchip: rk3288: pinctrl: support more pins
The rgmii_pins node in rk3288.dtsi configures 15 pins. Increase the size of the cell array to accomedate that, otherwise only the first 10 get configured. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pinctrl/rockchip')
-rw-r--r--drivers/pinctrl/rockchip/pinctrl_rk3288.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3288.c b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
index 7c769bdb01..1fa1daa939 100644
--- a/drivers/pinctrl/rockchip/pinctrl_rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3288.c
@@ -623,7 +623,7 @@ static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
{
const void *blob = gd->fdt_blob;
int pcfg_node, ret, flags, count, i;
- u32 cell[40], *ptr;
+ u32 cell[60], *ptr;
debug("%s: %s %s\n", __func__, dev->name, config->name);
ret = fdtdec_get_int_array_count(blob, config->of_offset,