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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-06-29 19:38:59 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-07-02 05:44:29 +0900
commit5e25b9d5d90205ce9531677e362e9dd9359963b3 (patch)
treed085fd64c64d2d9f7d669c539e247876beafb7bb /drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
parent3379987e26956d9eab668a0811a0f0a9a056754f (diff)
pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration (pin biasing, drive strength control), but not pin-muxing. Allow to fill the mux value table with -1 for those pins; pins with mux value -1 will be skipped in the pin-mux set function. The mux value type should be changed from "unsigned" to "int" in order to accommodate -1 as a special case. [ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-core.c')
-rw-r--r--drivers/pinctrl/uniphier/pinctrl-uniphier-core.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index fc8bbd292b..0ad15abb4a 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -91,7 +91,7 @@ static void uniphier_pinconf_input_enable(struct udevice *dev, unsigned pin)
}
static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
- unsigned muxval)
+ int muxval)
{
struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
unsigned mux_bits, reg_stride, reg, reg_end, shift, mask;
@@ -101,6 +101,9 @@ static void uniphier_pinmux_set_one(struct udevice *dev, unsigned pin,
/* some pins need input-enabling */
uniphier_pinconf_input_enable(dev, pin);
+ if (muxval < 0)
+ return; /* dedicated pin; nothing to do for pin-mux */
+
if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) {
/*
* Mode offset bit