pinctrl: uniphier: simplify input enable and delete pin arrays

The pin data are implemented for old SoCs to specify the bit shift of
the IECTRL register.  They are not wortwhile given the required memory
footprint.  Delete all the pin data and enable all bits of the IECTRL
register.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 3 insertions, 14 deletions

diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index d314482acf..215b19ea0e 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <linux/io.h>
 #include <linux/err.h>
+#include <linux/kernel.h>
 #include <linux/sizes.h>
 #include <dm/pinctrl.h>
 
@@ -81,9 +82,6 @@ static int uniphier_pinconf_input_enable_legacy(struct udevice *dev,
 						unsigned int pin, int enable)
 {
 	struct uniphier_pinctrl_priv *priv = dev_get_priv(dev);
-	int pins_count = priv->socdata->pins_count;
-	const struct uniphier_pinctrl_pin *pins = priv->socdata->pins;
-	int i;
 
 	/*
 	 * Multiple pins share one input enable, per-pin disabling is
@@ -92,17 +90,8 @@ static int uniphier_pinconf_input_enable_legacy(struct udevice *dev,
 	if (!enable)
 		return -EINVAL;
 
-	for (i = 0; i < pins_count; i++) {
-		if (pins[i].number == pin) {
-			unsigned int iectrl;
-			u32 tmp;
-
-			iectrl = uniphier_pin_get_iectrl(pins[i].data);
-			tmp = readl(priv->base + UNIPHIER_PINCTRL_IECTRL);
-			tmp |= 1 << iectrl;
-			writel(tmp, priv->base + UNIPHIER_PINCTRL_IECTRL);
-		}
-	}
+	/* Set all bits instead of having a bunch of pin data */
+	writel(U32_MAX, priv->base + UNIPHIER_PINCTRL_IECTRL);
 
 	return 0;
 }