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authorTom Rini <trini@konsulko.com>2020-05-11 09:46:43 -0400
committerTom Rini <trini@konsulko.com>2020-05-11 09:46:43 -0400
commit1bccb23b7bb67e029cc6b22bf7d25243ef71c43c (patch)
tree9fe0b6397d88359177131348a077aad28836285d /drivers/pinctrl
parent951db64186b2b9ad2e3ee30e2093deea005bdd8a (diff)
parentd52a03b130565e6b01dcbe656ebeb611d5ee1aa1 (diff)
Merge tag 'u-boot-imx-20200511' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
i.MX for 2020.07 ---------------- - i.MX NAND and nandbxb for i.MX8M - imx8MM : new beacon devkit - imx8MQ : new pico-imx8MQ - imx8QXP : extend to enable M4, fixes - add thermal support - caches in SPL (missing board) - Fixes Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/685391011
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/nxp/pinctrl-scu.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c
index aa11075e0a..c032be782a 100644
--- a/drivers/pinctrl/nxp/pinctrl-scu.c
+++ b/drivers/pinctrl/nxp/pinctrl-scu.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2018 NXP
+ * Copyright 2018-2019 NXP
*/
#include <common.h>
@@ -29,6 +29,11 @@ static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad,
* to handle that in scfw, so config it in pad conf func
*/
+ if (!sc_rm_is_pad_owned(-1, pad)) {
+ debug("Pad[%u] is not owned by curr partition\n", pad);
+ return -EPERM;
+ }
+
val |= PADRING_IFMUX_EN_MASK;
val |= PADRING_GP_EN_MASK;
val |= (mux << PADRING_IFMUX_SHIFT) & PADRING_IFMUX_MASK;
@@ -57,7 +62,7 @@ int imx_pinctrl_scu_conf_pins(struct imx_pinctrl_soc_info *info, u32 *pin_data,
config_val = pin_data[j++];
ret = imx_pinconf_scu_set(info, pin_id, mux, config_val);
- if (ret)
+ if (ret && ret != -EPERM)
printf("Set pin %d, mux %d, val %d, error\n", pin_id,
mux, config_val);
}