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authorAdam Ford <aford173@gmail.com>2020-06-30 09:30:09 -0500
committerMarek Vasut <marek.vasut+renesas@gmail.com>2020-07-25 11:16:39 +0200
commit43ef80325bdfa895a2b0c57541ce748f1cb940d2 (patch)
tree97bdfe40bf51edee593ab0234167bbd409ff45f7 /drivers/pinctrl
parente9a52c4439288024add0a526481b5af7b9daa87b (diff)
pinctrl: renesas: Enable R8A774A1 PFC tables
The PFC tables for the R8A774A1 are already available, but they not enabled. This patch adds the Kconfig option and builds the corresponding file when PINCTRL_PFC_R8A774A1 is enabled. Signed-off-by: Adam Ford <aford173@gmail.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/renesas/Kconfig10
-rw-r--r--drivers/pinctrl/renesas/Makefile1
-rw-r--r--drivers/pinctrl/renesas/pfc.c11
-rw-r--r--drivers/pinctrl/renesas/sh_pfc.h1
4 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 4d3d68d307..8327bcabd6 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A7796
the GPIO definitions and pin control functions for each available
multiplex function.
+config PINCTRL_PFC_R8A774A1
+ bool "Renesas RCar Gen3 R8A774A1 pin control driver"
+ depends on PINCTRL_PFC
+ help
+ Support pin multiplexing control on Renesas RZG2M R8A774A1 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
config PINCTRL_PFC_R8A77965
bool "Renesas RCar Gen3 R8A77965 pin control driver"
depends on PINCTRL_PFC
diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index a92f787a89..a4eb912d54 100644
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -1,4 +1,5 @@
obj-$(CONFIG_PINCTRL_PFC) += pfc.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 1179afd2e7..7ba7849593 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -32,6 +32,7 @@ enum sh_pfc_model {
SH_PFC_R8A7794,
SH_PFC_R8A7795,
SH_PFC_R8A7796,
+ SH_PFC_R8A774A1,
SH_PFC_R8A77965,
SH_PFC_R8A77970,
SH_PFC_R8A77980,
@@ -853,6 +854,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
if (model == SH_PFC_R8A7796)
priv->pfc.info = &r8a7796_pinmux_info;
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+ if (model == SH_PFC_R8A774A1)
+ priv->pfc.info = &r8a774a1_pinmux_info;
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965
if (model == SH_PFC_R8A77965)
priv->pfc.info = &r8a77965_pinmux_info;
@@ -924,6 +929,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
.data = SH_PFC_R8A7796,
},
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774A1
+ {
+ .compatible = "renesas,pfc-r8a774a1",
+ .data = SH_PFC_R8A774A1,
+ },
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A77965
{
.compatible = "renesas,pfc-r8a77965",
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index db3d513358..81c0179948 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -293,6 +293,7 @@ const struct pinmux_bias_reg *
sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
unsigned int *bit);
+extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
extern const struct sh_pfc_soc_info r8a7792_pinmux_info;