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authorTom Rini <trini@konsulko.com>2019-05-24 08:13:27 -0400
committerTom Rini <trini@konsulko.com>2019-05-24 08:13:27 -0400
commit866a78dc28411f4c76ba887f439f69f1116d8a6b (patch)
treee9e7f1255f290783c4f748983debbf832495764e /drivers/ram/stm32mp1/stm32mp1_ddr.h
parentafe9e1f197e6d0ee4fa59d56639ca56d5f2ed566 (diff)
parent187c41d783371dc3b7ecae45f450b330f5e1bb25 (diff)
Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ... - Add STM32MP1 DDR driver update: These update introduce the DDR interactive mode described in: https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode This mode is used by the CubeMX: DDR tuning tool. https://wiki.st.com/stm32mpu/index.php/STM32CubeMX The DDR interactive mode is NOT activated by default because it increase the SPL size and slow down the boot time (200ms wait added).
Diffstat (limited to 'drivers/ram/stm32mp1/stm32mp1_ddr.h')
-rw-r--r--drivers/ram/stm32mp1/stm32mp1_ddr.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.h b/drivers/ram/stm32mp1/stm32mp1_ddr.h
index 3cd0161299..a8eed89e3c 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.h
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.h
@@ -157,7 +157,7 @@ struct stm32mp1_ddrphy_cal {
struct stm32mp1_ddr_info {
const char *name;
- u16 speed; /* in MHZ */
+ u32 speed; /* in kHZ */
u32 size; /* memory size in byte = col * row * width */
};
@@ -172,7 +172,7 @@ struct stm32mp1_ddr_config {
struct stm32mp1_ddrphy_cal p_cal;
};
-int stm32mp1_ddr_clk_enable(struct ddr_info *priv, u16 mem_speed);
+int stm32mp1_ddr_clk_enable(struct ddr_info *priv, u32 mem_speed);
void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir);
void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl);
void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl,