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author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-04-10 14:09:21 +0200 |
---|---|---|
committer | Patrice Chotard <patrice.chotard@st.com> | 2019-05-23 11:38:10 +0200 |
commit | c3ec370aed1d64c70578b22b18bed5c05f040962 (patch) | |
tree | d42372102ec51cc63438704d974f401aa9918ea6 /drivers/ram/stm32mp1 | |
parent | 66dba9a18b04d5eafd1b3bfe11b7584135aadb70 (diff) |
stm32mp1: ram: update mask for operating mode
Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/ram/stm32mp1')
-rw-r--r-- | drivers/ram/stm32mp1/stm32mp1_ddr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c index c7c3ba70a4..caa7813d44 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ddr.c +++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c @@ -312,7 +312,7 @@ static void wait_operating_mode(struct ddr_info *priv, int mode) /* self-refresh due to software => check also STAT.selfref_type */ if (mode == DDRCTRL_STAT_OPERATING_MODE_SR) { mask |= DDRCTRL_STAT_SELFREF_TYPE_MASK; - stat |= DDRCTRL_STAT_SELFREF_TYPE_SR; + val |= DDRCTRL_STAT_SELFREF_TYPE_SR; } else if (mode == DDRCTRL_STAT_OPERATING_MODE_NORMAL) { /* normal mode: handle also automatic self refresh */ mask2 = DDRCTRL_STAT_OPERATING_MODE_MASK | |