diff options
| author | Tom Rini <trini@konsulko.com> | 2019-11-11 14:19:32 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-11-11 14:19:32 -0500 |
| commit | 086e391bc46d3dda5c44053532bb51dc3827ee94 (patch) | |
| tree | 0b550df896976ad003864a028417b16a66b58702 /drivers/ram | |
| parent | 0b73ef0c02313e651af4b0a8e206c7c4a198e7f8 (diff) | |
| parent | f74a089e47e0b485fb70dcadfbf093daf64a740a (diff) | |
Merge tag 'u-boot-rockchip-20191110' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
Diffstat (limited to 'drivers/ram')
| -rw-r--r-- | drivers/ram/rockchip/sdram_rk3328.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index 656696ac3c..e84c9be6a2 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq) setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4); clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3); - if (freq <= (400 * MHz)) + if (freq <= 400) /* DLL bypass */ setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); else clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f); - if (freq <= (680 * MHz)) + if (freq <= 680) tmp = 2; else tmp = 1; @@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram, copy_to_reg(PHY_REG(phy_base, 0x70), &sdram_params->skew.cs0_dm0_skew[0], 44 * 4); copy_to_reg(PHY_REG(phy_base, 0xc0), - &sdram_params->skew.cs0_dm1_skew[0], 44 * 4); + &sdram_params->skew.cs1_dm0_skew[0], 44 * 4); } static int update_refresh_reg(struct dram_info *dram) |