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authorFabien Dessenne <fabien.dessenne@st.com>2019-05-31 15:11:34 +0200
committerPatrick Delaunay <patrick.delaunay@st.com>2019-07-22 09:21:28 +0200
commit6bed04fbd426eb7d0614900095b92830772c80eb (patch)
treecaebbe0d316b0cc32846d4ce3b3b2eb3275140ec /drivers/remoteproc/stm32_copro.c
parent7a7c4cb0f0440ce7384e233583b32c75ef534ddc (diff)
remoteproc: Introduce STM32 Cortex-M4 remoteproc driver
This patch introduces support of Cortex-M4 remote processor for STM32 MCU and MPU families. Signed-off-by: Loic Pallardy <loic.pallardy@st.com> Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Diffstat (limited to 'drivers/remoteproc/stm32_copro.c')
-rw-r--r--drivers/remoteproc/stm32_copro.c257
1 files changed, 257 insertions, 0 deletions
diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c
new file mode 100644
index 0000000000..de3b9729f3
--- /dev/null
+++ b/drivers/remoteproc/stm32_copro.c
@@ -0,0 +1,257 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
+ */
+#define pr_fmt(fmt) "%s: " fmt, __func__
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <regmap.h>
+#include <remoteproc.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/io.h>
+
+#define RCC_GCR_HOLD_BOOT 0
+#define RCC_GCR_RELEASE_BOOT 1
+
+/**
+ * struct stm32_copro_privdata - power processor private data
+ * @reset_ctl: reset controller handle
+ * @hold_boot_regmap: regmap for remote processor reset hold boot
+ * @hold_boot_offset: offset of the register controlling the hold boot setting
+ * @hold_boot_mask: bitmask of the register for the hold boot field
+ * @is_running: is the remote processor running
+ */
+struct stm32_copro_privdata {
+ struct reset_ctl reset_ctl;
+ struct regmap *hold_boot_regmap;
+ uint hold_boot_offset;
+ uint hold_boot_mask;
+ bool is_running;
+};
+
+/**
+ * stm32_copro_probe() - Basic probe
+ * @dev: corresponding STM32 remote processor device
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_probe(struct udevice *dev)
+{
+ struct stm32_copro_privdata *priv;
+ struct regmap *regmap;
+ const fdt32_t *cell;
+ int len, ret;
+
+ priv = dev_get_priv(dev);
+
+ regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscfg-holdboot");
+ if (IS_ERR(regmap)) {
+ dev_err(dev, "unable to find holdboot regmap (%ld)\n",
+ PTR_ERR(regmap));
+ return PTR_ERR(regmap);
+ }
+
+ cell = dev_read_prop(dev, "st,syscfg-holdboot", &len);
+ if (len < 3 * sizeof(fdt32_t)) {
+ dev_err(dev, "holdboot offset and mask not available\n");
+ return -EINVAL;
+ }
+
+ priv->hold_boot_regmap = regmap;
+ priv->hold_boot_offset = fdtdec_get_number(cell + 1, 1);
+ priv->hold_boot_mask = fdtdec_get_number(cell + 2, 1);
+
+ ret = reset_get_by_index(dev, 0, &priv->reset_ctl);
+ if (ret) {
+ dev_err(dev, "failed to get reset (%d)\n", ret);
+ return ret;
+ }
+
+ dev_dbg(dev, "probed\n");
+
+ return 0;
+}
+
+/**
+ * stm32_copro_set_hold_boot() - Hold boot bit management
+ * @dev: corresponding STM32 remote processor device
+ * @hold: hold boot value
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_set_hold_boot(struct udevice *dev, bool hold)
+{
+ struct stm32_copro_privdata *priv;
+ uint val;
+ int ret;
+
+ priv = dev_get_priv(dev);
+
+ val = hold ? RCC_GCR_HOLD_BOOT : RCC_GCR_RELEASE_BOOT;
+
+ /*
+ * Note: shall run an SMC call (STM32_SMC_RCC) if platform is secured.
+ * To be updated when the code for this SMC service is available which
+ * is not the case for the time being.
+ */
+ ret = regmap_update_bits(priv->hold_boot_regmap, priv->hold_boot_offset,
+ priv->hold_boot_mask, val);
+ if (ret)
+ dev_err(dev, "failed to set hold boot\n");
+
+ return ret;
+}
+
+/**
+ * stm32_copro_device_to_virt() - Convert device address to virtual address
+ * @dev: corresponding STM32 remote processor device
+ * @da: device address
+ * @return converted virtual address
+ */
+static void *stm32_copro_device_to_virt(struct udevice *dev, ulong da)
+{
+ fdt32_t in_addr = cpu_to_be32(da);
+ u64 paddr;
+
+ paddr = dev_translate_dma_address(dev, &in_addr);
+ if (paddr == OF_BAD_ADDR) {
+ dev_err(dev, "Unable to convert address %ld\n", da);
+ return NULL;
+ }
+
+ return phys_to_virt(paddr);
+}
+
+/**
+ * stm32_copro_load() - Loadup the STM32 remote processor
+ * @dev: corresponding STM32 remote processor device
+ * @addr: Address in memory where image is stored
+ * @size: Size in bytes of the image
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_load(struct udevice *dev, ulong addr, ulong size)
+{
+ struct stm32_copro_privdata *priv;
+ int ret;
+
+ priv = dev_get_priv(dev);
+
+ ret = stm32_copro_set_hold_boot(dev, true);
+ if (ret)
+ return ret;
+
+ ret = reset_assert(&priv->reset_ctl);
+ if (ret) {
+ dev_err(dev, "Unable to assert reset line (ret=%d)\n", ret);
+ return ret;
+ }
+
+ /* Support only ELF32 image */
+ ret = rproc_elf32_sanity_check(addr, size);
+ if (ret) {
+ dev_err(dev, "Invalid ELF32 image (%d)\n", ret);
+ return ret;
+ }
+
+ return rproc_elf32_load_image(dev, addr);
+}
+
+/**
+ * stm32_copro_start() - Start the STM32 remote processor
+ * @dev: corresponding STM32 remote processor device
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_start(struct udevice *dev)
+{
+ struct stm32_copro_privdata *priv;
+ int ret;
+
+ priv = dev_get_priv(dev);
+
+ /* move hold boot from true to false start the copro */
+ ret = stm32_copro_set_hold_boot(dev, false);
+ if (ret)
+ return ret;
+
+ /*
+ * Once copro running, reset hold boot flag to avoid copro
+ * rebooting autonomously
+ */
+ ret = stm32_copro_set_hold_boot(dev, true);
+ priv->is_running = !ret;
+ return ret;
+}
+
+/**
+ * stm32_copro_reset() - Reset the STM32 remote processor
+ * @dev: corresponding STM32 remote processor device
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_reset(struct udevice *dev)
+{
+ struct stm32_copro_privdata *priv;
+ int ret;
+
+ priv = dev_get_priv(dev);
+
+ ret = stm32_copro_set_hold_boot(dev, true);
+ if (ret)
+ return ret;
+
+ ret = reset_assert(&priv->reset_ctl);
+ if (ret) {
+ dev_err(dev, "Unable to assert reset line (ret=%d)\n", ret);
+ return ret;
+ }
+
+ priv->is_running = false;
+
+ return 0;
+}
+
+/**
+ * stm32_copro_stop() - Stop the STM32 remote processor
+ * @dev: corresponding STM32 remote processor device
+ * @return 0 if all went ok, else corresponding -ve error
+ */
+static int stm32_copro_stop(struct udevice *dev)
+{
+ return stm32_copro_reset(dev);
+}
+
+/**
+ * stm32_copro_is_running() - Is the STM32 remote processor running
+ * @dev: corresponding STM32 remote processor device
+ * @return 1 if the remote processor is running, 0 otherwise
+ */
+static int stm32_copro_is_running(struct udevice *dev)
+{
+ struct stm32_copro_privdata *priv;
+
+ priv = dev_get_priv(dev);
+ return priv->is_running;
+}
+
+static const struct dm_rproc_ops stm32_copro_ops = {
+ .load = stm32_copro_load,
+ .start = stm32_copro_start,
+ .stop = stm32_copro_stop,
+ .reset = stm32_copro_reset,
+ .is_running = stm32_copro_is_running,
+ .device_to_virt = stm32_copro_device_to_virt,
+};
+
+static const struct udevice_id stm32_copro_ids[] = {
+ {.compatible = "st,stm32mp1-rproc"},
+ {}
+};
+
+U_BOOT_DRIVER(stm32_copro) = {
+ .name = "stm32_m4_proc",
+ .of_match = stm32_copro_ids,
+ .id = UCLASS_REMOTEPROC,
+ .ops = &stm32_copro_ops,
+ .probe = stm32_copro_probe,
+ .priv_auto_alloc_size = sizeof(struct stm32_copro_privdata),
+};