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author | Fabio Estevam <fabio.estevam@nxp.com> | 2016-08-29 20:37:17 -0300 |
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committer | Stefano Babic <sbabic@denx.de> | 2016-09-06 18:22:48 +0200 |
commit | b343417e2959d043ffd831fd15b08e2a49de6340 (patch) | |
tree | 403131d071d0464b7df090336bb83c075621ff9d /drivers/rtc/mxsrtc.c | |
parent | 7dbda25ecd6d7cba13d29161675309ca43e3ba12 (diff) |
mx6ul_14x14_evk: Adjust SPL DDR3 settings
Adjust DDR3 initialization done in SPL by comparing them against
the NXP DCD table.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Diffstat (limited to 'drivers/rtc/mxsrtc.c')
0 files changed, 0 insertions, 0 deletions