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authorJagan Teki <jagan@amarulasolutions.com>2018-08-02 16:52:37 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:19:08 +0530
commit6590bd8c47b47ae97ac43efd17c8a0e2f5ddb855 (patch)
tree66b1e08400493cb4d5ff24b5151efb5104d078a1 /drivers/rtc/pcf2127.c
parente945816efbd3541f4a4e877e13221768f0b9f775 (diff)
clk: sunxi: Add Allwinner A10/A20 CLK driver
Add initial clock driver for Allwinner A10/A20. - Implement USB ahb and USB clocks via ccu_clk_gate table for A10/A20, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB resets via ccu_reset table for A10/A20, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/rtc/pcf2127.c')
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