diff options
author | Vabhav Sharma <vabhav.sharma@nxp.com> | 2019-01-31 12:08:10 +0000 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2019-07-10 16:52:58 -0600 |
commit | 1edc5688df70ee3ddb692ef3429ac28ed8666a4b (patch) | |
tree | 5fdcdd19b232d1c37050785a96a057b1b4db6d25 /drivers/serial/serial_lpuart.c | |
parent | ca2abb75a086d8b0bdb51689f331ba8f1a146379 (diff) |
drivers: serial: lpuart: Enable Little Endian Support
By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial/serial_lpuart.c')
-rw-r--r-- | drivers/serial/serial_lpuart.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index a357b00d28..57dd4a72c6 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -1,5 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright 2019 NXP * Copyright 2013 Freescale Semiconductor, Inc. */ @@ -502,6 +503,9 @@ static int lpuart_serial_ofdata_to_platdata(struct udevice *dev) plat->reg = (void *)addr; plat->flags = dev_get_driver_data(dev); + if (fdtdec_get_bool(blob, node, "little-endian")) + plat->flags &= ~LPUART_FLAG_REGMAP_ENDIAN_BIG; + if (!fdt_node_check_compatible(blob, node, "fsl,ls1021a-lpuart")) plat->devtype = DEV_LS1021A; else if (!fdt_node_check_compatible(blob, node, "fsl,imx7ulp-lpuart")) |