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authorAnup Patel <anup@brainfault.org>2018-12-15 11:35:15 +0530
committerAndes <uboot@andestech.com>2018-12-18 09:56:54 +0800
commite2842496ac64c19a0c40cb4cbe301d9d91cf0f56 (patch)
tree327ef0a22123e963b4f7e0a2bfe3695a49ff2187 /drivers/serial/serial_pic32.c
parentdcad9b8d66d68e9258ce4be89fb0ac9ab95083b0 (diff)
drivers: serial: Add SiFive UART driver
This patch adds SiFive UART driver. The driver is 100% DM driver and it determines input clock using clk framework. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/serial/serial_pic32.c')
0 files changed, 0 insertions, 0 deletions