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authorÁlvaro Fernández Rojas <noltari@gmail.com>2017-05-22 20:01:46 +0200
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2017-05-31 14:55:20 +0200
commit24f85482c90227d6ba4cc3739874bae7e8969a62 (patch)
tree3b0f9b146072c575680f863ba86512c26feda729 /drivers/serial
parent6b7185f3eea0e176063df4ae8ed3fde9ae87d246 (diff)
dm: serial: bcm6345: fix baud rate clock calculation
It's currently bugged and doesn't work for even cases. Right shift bits instead of dividing and fix even cases. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/serial_bcm6345.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
index 14c1bf26c1..0843b48bea 100644
--- a/drivers/serial/serial_bcm6345.c
+++ b/drivers/serial/serial_bcm6345.c
@@ -157,11 +157,11 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
UART_FIFO_CFG_TX_4);
/* set baud rate */
- val = (clk / baudrate) / 16;
+ val = ((clk / baudrate) >> 4);
if (val & 0x1)
- val = val;
+ val = (val >> 1);
else
- val = val / 2 - 1;
+ val = (val >> 1) - 1;
writel_be(val, base + UART_BAUD_REG);
/* clear interrupts */
@@ -243,7 +243,7 @@ static int bcm6345_serial_probe(struct udevice *dev)
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
- priv->uartclk = clk_get_rate(&clk) / 2;
+ priv->uartclk = clk_get_rate(&clk);
clk_free(&clk);
/* initialize serial */