diff options
author | Hugo Villeneuve <hugo.villeneuve@lyrtech.com> | 2008-07-11 10:24:15 -0400 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2008-07-13 15:13:31 +0200 |
commit | ef130d3093bdf88f01cf3e000fe5df249ebf2b1a (patch) | |
tree | b04b2b5e0c0819dcf22d630d2fe9a8b7be475e76 /drivers/serial | |
parent | 6b760189d77f001684e3160b355c185ca3804961 (diff) |
Fix integer overflow warning in calc_divisor()
which happened when rounding the serial port clock divisor
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/serial.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 182ca2d149..4ccaee28b0 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -124,6 +124,8 @@ static NS16550_t serial_ports[4] = { static int calc_divisor (NS16550_t port) { + uint32_t clk_divisor; + #ifdef CONFIG_OMAP1510 /* If can't cleanly clock 115200 set div to 1 */ if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) { @@ -147,10 +149,15 @@ static int calc_divisor (NS16550_t port) /* Compute divisor value. Normally, we should simply return: * CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate - * but we need to round that value by adding 0.5 or 8/16. + * but we need to round that value by adding 0.5 (2/4). * Rounding is especially important at high baud rates. */ - return (((16 * CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate) + 8) / 16; + clk_divisor = (((4 * CFG_NS16550_CLK) / + (MODE_X_DIV * gd->baudrate)) + 2) / 4; + + debug("NS16550 clock divisor = %d\n", clk_divisor); + + return clk_divisor; } #if !defined(CONFIG_SERIAL_MULTI) |