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authorTom Rini <trini@konsulko.com>2018-07-19 11:48:33 -0400
committerTom Rini <trini@konsulko.com>2018-07-19 11:48:33 -0400
commitf7e48c54b246c460503e90315d0cd50ccbd586c6 (patch)
tree836d7fd9f833b285645a33e457b74be6110a0e08 /drivers/serial
parent1adbf2966adebe67de3dd17094749d387604194e (diff)
parent577012da71ea9dcf07272c7f458218aa8ab29984 (diff)
Merge tag 'xilinx-for-v2018.09' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.09 clk: - Fix zynqmp clock driver common: - Handle CMD_RET_USAGE in cmd_process_error - Use return macros in cmd_process_error - Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2 - Support watchdog in usb_kbd.c - Fix name usage in usb_kbd.c - Support systems with non zero memory start initialized from DT only gpio: - Add support for manual relocation in uclass - zynq - use live tree - zynq - fix match data reading - zynq - setup bank name - xilinx - convert driver to DM microblaze: - Use generic iounmap/ioremap implementations - Redesign reset logic with sysreset features - Use watchdog and gpio over DM - Remove unused macros and fix some checkpatch issues - Fix timer initialization not to be called twice serial: - zynq - Use platdata intead of priv data sysreset: - Add support for manual relocation in uclass - Add gpio-restart driver - Add microblaze soft reset driver watchdog: - Add support for aliases in uclass - Add support for manual relocation in uclass - Convert xilinx driver to DM - cadence - update info in the driver and not stop wdt in probe xilinx: - Enable LED gpio for some targets with gpio-leds DT node - Setup variables via Kconfig zynq: - Add support for watchdog aliases - Add support for mini nand/nor configurations - Wire FPGA initalization in SPL zynqmp: - Enable mass storage for zcu100 - Handle external pmufw files - Add support for secure images - Some Kconfig movements and alignments - Add support for watchdog aliases - Use subcommands style for platform command - Add mmio_read/write platform commands - DT updates - Add support for mini qspi configuration
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/serial_zynq.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index a191772ff0..f689015b4a 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -39,7 +39,7 @@ struct uart_zynq {
u32 baud_rate_divider; /* 0x34 - Baud Rate Divider [7:0] */
};
-struct zynq_uart_priv {
+struct zynq_uart_platdata {
struct uart_zynq *regs;
};
@@ -105,7 +105,7 @@ static int _uart_zynq_serial_putc(struct uart_zynq *regs, const char c)
static int zynq_serial_setbrg(struct udevice *dev, int baudrate)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
unsigned long clock;
int ret;
@@ -130,28 +130,28 @@ static int zynq_serial_setbrg(struct udevice *dev, int baudrate)
return ret;
}
- _uart_zynq_serial_setbrg(priv->regs, clock, baudrate);
+ _uart_zynq_serial_setbrg(platdata->regs, clock, baudrate);
return 0;
}
static int zynq_serial_probe(struct udevice *dev)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
/* No need to reinitialize the UART after relocation */
if (gd->flags & GD_FLG_RELOC)
return 0;
- _uart_zynq_serial_init(priv->regs);
+ _uart_zynq_serial_init(platdata->regs);
return 0;
}
static int zynq_serial_getc(struct udevice *dev)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
- struct uart_zynq *regs = priv->regs;
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
+ struct uart_zynq *regs = platdata->regs;
if (readl(&regs->channel_sts) & ZYNQ_UART_SR_RXEMPTY)
return -EAGAIN;
@@ -161,15 +161,15 @@ static int zynq_serial_getc(struct udevice *dev)
static int zynq_serial_putc(struct udevice *dev, const char ch)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
- return _uart_zynq_serial_putc(priv->regs, ch);
+ return _uart_zynq_serial_putc(platdata->regs, ch);
}
static int zynq_serial_pending(struct udevice *dev, bool input)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
- struct uart_zynq *regs = priv->regs;
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
+ struct uart_zynq *regs = platdata->regs;
if (input)
return !(readl(&regs->channel_sts) & ZYNQ_UART_SR_RXEMPTY);
@@ -179,11 +179,11 @@ static int zynq_serial_pending(struct udevice *dev, bool input)
static int zynq_serial_ofdata_to_platdata(struct udevice *dev)
{
- struct zynq_uart_priv *priv = dev_get_priv(dev);
+ struct zynq_uart_platdata *platdata = dev_get_platdata(dev);
- priv->regs = (struct uart_zynq *)dev_read_addr(dev);
- if (IS_ERR(priv->regs))
- return PTR_ERR(priv->regs);
+ platdata->regs = (struct uart_zynq *)dev_read_addr(dev);
+ if (IS_ERR(platdata->regs))
+ return PTR_ERR(platdata->regs);
return 0;
}
@@ -207,7 +207,7 @@ U_BOOT_DRIVER(serial_zynq) = {
.id = UCLASS_SERIAL,
.of_match = zynq_serial_ids,
.ofdata_to_platdata = zynq_serial_ofdata_to_platdata,
- .priv_auto_alloc_size = sizeof(struct zynq_uart_priv),
+ .platdata_auto_alloc_size = sizeof(struct zynq_uart_platdata),
.probe = zynq_serial_probe,
.ops = &zynq_serial_ops,
.flags = DM_FLAG_PRE_RELOC,