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authorSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>2019-11-20 22:27:31 +0100
committerMarek Vasut <marex@denx.de>2019-11-20 23:46:11 +0100
commit64c7c8c91cc945a4e8ebb87ec33fbfed8d2b6a23 (patch)
tree285f8ec37fff6d6bcdb5718fbcade6b4278fa916 /drivers/spi/cadence_qspi.h
parentcaaaf62ac89fc9b794d75cbb8c198b1684e736e1 (diff)
spi: cadence_qspi: support DM_CLK
Support loading clk speed via DM instead of requiring ad-hoc code. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'drivers/spi/cadence_qspi.h')
-rw-r--r--drivers/spi/cadence_qspi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h
index 20cceca239..99dee75bbd 100644
--- a/drivers/spi/cadence_qspi.h
+++ b/drivers/spi/cadence_qspi.h
@@ -16,6 +16,7 @@
#define CQSPI_READ_CAPTURE_MAX_DELAY 16
struct cadence_spi_platdata {
+ unsigned int ref_clk_hz;
unsigned int max_hz;
void *regbase;
void *ahbbase;