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authorMasahiro Yamada <yamada.masahiro@socionext.com>2019-06-26 13:51:47 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2019-07-10 22:37:23 +0900
commit92edfff6c63f08a29a5b5deb7b11121954a2f6b9 (patch)
treef286f82cebf850d28b8f4628842770e1753c468e /drivers/spi/cadence_qspi.h
parent382de4a7e9278cdd086897ef94b02d35cbd8aa5e (diff)
ARM: uniphier_v8_defconfig: make 64bit SoC image position independent
For a planned new SoC in this SoC family, the base address of the DRAM will be changed from 0x80000000 to 0x20000000. The PIE support will be useful to maintain multiple similar SoCs whose DRAM addresses differ. Now CONFIG_SYS_TEXT_BASE is not important. I just set it to 0 to ensure CONFIG_POSITION_INDEPENDENT is working. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'drivers/spi/cadence_qspi.h')
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