summaryrefslogtreecommitdiff
path: root/drivers/spi/ich.c
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2019-12-06 21:42:49 -0700
committerBin Meng <bmeng.cn@gmail.com>2019-12-15 11:44:24 +0800
commit3937df3d6c0b88745399434c58d80960f7bf31af (patch)
treec07e4f2daafa507acc3af52dd8adb1ececa3a086 /drivers/spi/ich.c
parent636555a4c4c96607613a7013b4b8536b10b5e8e4 (diff)
spi: ich: Add Apollo Lake support
Add support for Apollo Lake to the ICH driver. This involves adjusting the mmio address and skipping setting of the bbar. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/spi/ich.c')
-rw-r--r--drivers/spi/ich.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 0cd073c03c..133b25b72e 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -106,10 +106,12 @@ static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr)
const uint32_t bbar_mask = 0x00ffff00;
uint32_t ichspi_bbar;
- minaddr &= bbar_mask;
- ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask;
- ichspi_bbar |= minaddr;
- ich_writel(ctlr, ichspi_bbar, ctlr->bbar);
+ if (ctlr->bbar) {
+ minaddr &= bbar_mask;
+ ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask;
+ ichspi_bbar |= minaddr;
+ ich_writel(ctlr, ichspi_bbar, ctlr->bbar);
+ }
}
/* @return 1 if the SPI flash supports the 33MHz speed */
@@ -750,6 +752,7 @@ static int ich_init_controller(struct udevice *dev,
ctlr->preop = offsetof(struct ich9_spi_regs, preop);
ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
ctlr->pr = &ich9_spi->pr[0];
+ } else if (plat->ich_version == ICHV_APL) {
} else {
debug("ICH SPI: Unrecognised ICH version %d\n",
plat->ich_version);
@@ -878,7 +881,12 @@ static int ich_spi_ofdata_to_platdata(struct udevice *dev)
plat->ich_version = dev_get_driver_data(dev);
plat->lockdown = dev_read_bool(dev, "intel,spi-lock-down");
- pch_get_spi_base(priv->pch, &plat->mmio_base);
+ if (plat->ich_version == ICHV_APL) {
+ plat->mmio_base = dm_pci_read_bar32(dev, 0);
+ } else {
+ /* SBASE is similar */
+ pch_get_spi_base(priv->pch, &plat->mmio_base);
+ }
/*
* Use an int so that the property is present in of-platdata even
* when false.
@@ -916,6 +924,7 @@ static const struct dm_spi_ops ich_spi_ops = {
static const struct udevice_id ich_spi_ids[] = {
{ .compatible = "intel,ich7-spi", ICHV_7 },
{ .compatible = "intel,ich9-spi", ICHV_9 },
+ { .compatible = "intel,fast-spi", ICHV_APL },
{ }
};