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authorStephen Warren <swarren@nvidia.com>2014-03-21 12:28:58 -0600
committerTom Warren <twarren@nvidia.com>2014-04-17 08:41:05 -0700
commit70ad375ee444645001d3ca78bb17790b50232999 (patch)
tree5b6b1edfc674954bee1e8546bc173e74d2976b0b /drivers/spi/tegra20_sflash.c
parentdfb42fc95df6b5908fb593db9132018233430fe9 (diff)
ARM: tegra: Tegra20 pinmux cleanup
This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers/spi/tegra20_sflash.c')
-rw-r--r--drivers/spi/tegra20_sflash.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 603c024bcc..b5d561be34 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -208,9 +208,9 @@ int tegra20_spi_claim_bus(struct spi_slave *slave)
* SPI pins on Tegra20 are muxed - change pinmux later due to UART
* issue.
*/
- pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH);
- pinmux_tristate_disable(PINGRP_LSPI);
- pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
+ pinmux_set_func(PMUX_PINGRP_GMD, PMUX_FUNC_SFLASH);
+ pinmux_tristate_disable(PMUX_PINGRP_LSPI);
+ pinmux_set_func(PMUX_PINGRP_GMC, PMUX_FUNC_SFLASH);
return 0;
}