diff options
| author | Simon Glass <sjg@chromium.org> | 2019-12-06 21:41:50 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-12-15 11:44:10 +0800 |
| commit | 642e8487ec629b43b1c5caf846098bfc952be5c0 (patch) | |
| tree | 084b06a0418b7b7d3fbd3f43350361d2052ca701 /drivers/timer/Kconfig | |
| parent | 77dd7c6854f3bd8ddc422f0cb1953071fe00dc6c (diff) | |
x86: timer: Reduce timer code size in TPL on Intel CPUs
Most of the timer-calibration methods are not needed on recent Intel CPUs
and just increase code size. Add an option to use the known-good way to
get the clock frequency in TPL. Size reduction is about 700 bytes.
Note that version 1 of this commit caused bootstage to crash since the CPU
was not identified. This is corrected by changes previously applied to
make sure that the CPU is identified before spl_init() is called, such as
39146a2e0b x86: Move CPU init to before spl_init()
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/timer/Kconfig')
| -rw-r--r-- | drivers/timer/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 41f9755133..96cc49273f 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -188,6 +188,15 @@ config X86_TSC_READ_BASE The only exception is when U-Boot is used as a secondary bootloader, where this option should be enabled. +config TPL_X86_TSC_TIMER_NATIVE + bool "x86 TSC timer uses native calibration" + depends on TPL && X86_TSC_TIMER + help + Selects native timer calibration for TPL and don't include the other + methods in the code. This helps to reduce code size in TPL and works + on fairly modern Intel chips. Code-size reductions is about 700 + bytes. + config MTK_TIMER bool "MediaTek timer support" depends on TIMER |