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authorTom Rini <trini@konsulko.com>2018-06-15 09:38:06 -0400
committerTom Rini <trini@konsulko.com>2018-06-15 09:38:06 -0400
commitd94e89c7650f496ce1e9303093c1e2d268d91b1b (patch)
tree36e556587e05858de00cc837f98122d80bdecf1f /drivers/timer/cadence-ttc.c
parent9d0dc69235e8327dba5536761c768d40c4e514e5 (diff)
parentb729ed0d95415bd694a6b67c0761f03ef5a1e2bc (diff)
Merge tag 'xilinx-for-v2018.07-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.07-rc2 Zynq: - Fix missing watchdog header - DT fixes ZynqMP: - emmc configuration split - Enable SPD - Fix PMUFW_INIT_FILE logic - Coverity fixes in SoC code timer - Add timer_get_boot_us mmc: - Fix MMC HS200 tuning command serial: - Fix scrabled chars with OF_LIVE
Diffstat (limited to 'drivers/timer/cadence-ttc.c')
-rw-r--r--drivers/timer/cadence-ttc.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c
index 3541e5c841..4125a078b3 100644
--- a/drivers/timer/cadence-ttc.c
+++ b/drivers/timer/cadence-ttc.c
@@ -31,6 +31,28 @@ struct cadence_ttc_priv {
struct cadence_ttc_regs *regs;
};
+#if CONFIG_IS_ENABLED(BOOTSTAGE)
+ulong timer_get_boot_us(void)
+{
+ u64 ticks = 0;
+ u32 rate = 1;
+ u64 us;
+ int ret;
+
+ ret = dm_timer_init();
+ if (!ret) {
+ /* The timer is available */
+ rate = timer_get_rate(gd->timer);
+ timer_get_count(gd->timer, &ticks);
+ } else {
+ return 0;
+ }
+
+ us = (ticks * 1000) / rate;
+ return us;
+}
+#endif
+
static int cadence_ttc_get_count(struct udevice *dev, u64 *count)
{
struct cadence_ttc_priv *priv = dev_get_priv(dev);