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authorTom Rini <trini@konsulko.com>2020-05-31 20:07:39 -0400
committerTom Rini <trini@konsulko.com>2020-05-31 20:07:39 -0400
commit9452b7496f8b85ca3bdda1014495df1a6235a8de (patch)
tree211e31287f621183b7cebd3929983ad0c5c367b1 /drivers/usb/dwc3/dwc3-generic.c
parentd09b832cd8ccb7e37e2b188394df5a73d7074c3b (diff)
parenta343b4fe739a56ef248f01d96d80d080228b4068 (diff)
Merge tag 'u-boot-rockchip-20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts; - Add dwc3 host support with DM for rk3399; - Add usb2phy and typec phy for rockchip platform; - Migrate board list doc to rockchip.rst; - Add rk3399 Pinebook Pro board support; - Update dram_init in board_init and add memory node in SPL;
Diffstat (limited to 'drivers/usb/dwc3/dwc3-generic.c')
-rw-r--r--drivers/usb/dwc3/dwc3-generic.c34
1 files changed, 28 insertions, 6 deletions
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 484e7a7b8c..551f682024 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -16,6 +16,7 @@
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <linux/bitops.h>
+#include <linux/delay.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <malloc.h>
@@ -26,6 +27,12 @@
#include <clk.h>
#include <usb/xhci.h>
+struct dwc3_glue_data {
+ struct clk_bulk clks;
+ struct reset_ctl_bulk resets;
+ fdt_addr_t regs;
+};
+
struct dwc3_generic_plat {
fdt_addr_t base;
u32 maximum_speed;
@@ -49,6 +56,7 @@ static int dwc3_generic_probe(struct udevice *dev,
int rc;
struct dwc3_generic_plat *plat = dev_get_platdata(dev);
struct dwc3 *dwc3 = &priv->dwc3;
+ struct dwc3_glue_data *glue = dev_get_platdata(dev->parent);
dwc3->dev = dev;
dwc3->maximum_speed = plat->maximum_speed;
@@ -57,10 +65,22 @@ static int dwc3_generic_probe(struct udevice *dev,
dwc3_of_parse(dwc3);
#endif
+ /*
+ * It must hold whole USB3.0 OTG controller in resetting to hold pipe
+ * power state in P2 before initializing TypeC PHY on RK3399 platform.
+ */
+ if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
+ reset_assert_bulk(&glue->resets);
+ udelay(1);
+ }
+
rc = dwc3_setup_phy(dev, &priv->phys);
if (rc)
return rc;
+ if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
+ reset_deassert_bulk(&glue->resets);
+
priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
@@ -188,12 +208,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
};
#endif
-struct dwc3_glue_data {
- struct clk_bulk clks;
- struct reset_ctl_bulk resets;
- fdt_addr_t regs;
-};
-
struct dwc3_glue_ops {
void (*select_dr_mode)(struct udevice *dev, int index,
enum usb_dr_mode mode);
@@ -396,6 +410,12 @@ static int dwc3_glue_probe(struct udevice *dev)
if (ret)
return ret;
+ if (glue->resets.count == 0) {
+ ret = dwc3_glue_reset_init(child, glue);
+ if (ret)
+ return ret;
+ }
+
while (child) {
enum usb_dr_mode dr_mode;
@@ -427,6 +447,8 @@ static const struct udevice_id dwc3_glue_ids[] = {
{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
{ .compatible = "ti,am654-dwc3" },
+ { .compatible = "rockchip,rk3328-dwc3" },
+ { .compatible = "rockchip,rk3399-dwc3" },
{ }
};