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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-04-06 16:58:53 +0200
committerMarek Vasut <marex@denx.de>2017-04-14 16:44:16 +0200
commit889239d6b5c15c82d507498ded5e3b8fea2d44cf (patch)
treecd018da8fa84e27df9e04a96c8b82e31c6f587b5 /drivers/usb/dwc3/ep0.c
parentb7bf4a95922c3e1a4974aa34ebb714ac2eb89937 (diff)
usb: dwc3: gadget: make cache-maintenance on event buffers more robust
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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