diff options
| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-08-04 18:45:45 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-08-04 23:34:02 +0200 |
| commit | fa82f871c8dbc9a15e8dc274b3f99dd5fa0da458 (patch) | |
| tree | e42df8af804c785913a25c066368909a618b1dd8 /drivers/video/ct69000.c | |
| parent | eccfb49046fde7af9ae12ab59d97ae867368eaa8 (diff) | |
Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Diffstat (limited to 'drivers/video/ct69000.c')
| -rw-r--r-- | drivers/video/ct69000.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/video/ct69000.c b/drivers/video/ct69000.c index ae219ccf83..3db614d9f9 100644 --- a/drivers/video/ct69000.c +++ b/drivers/video/ct69000.c @@ -1,5 +1,5 @@ /* ported from ctfb.c (linux kernel): - * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de> + * Created in Jan - July 2000 by Thomas Höhenleitner <th@visuelle-maschinen.de> * * Ported to U-Boot: * (C) Copyright 2002 Denis Peter, MPL AG Switzerland @@ -626,25 +626,25 @@ FindBestPQFittingMN (unsigned int p, unsigned int q, unsigned int mnmin, /* that is the hardware < 69000 we have to manage +---------+ +-------------------+ +----------------------+ +--+ - | REFCLK |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__ - | 14.3MHz | |(NTSCDS) (÷1, ÷5) | |Select (RDS) (÷1, ÷4) | | | | + | REFCLK |__|NTSC Divisor Select|__|FVCO Reference Divisor|__|÷N|__ + | 14.3MHz | |(NTSCDS) (÷1, ÷5) | |Select (RDS) (÷1, ÷4) | | | | +---------+ +-------------------+ +----------------------+ +--+ | ___________________________________________________________________| | | fvco fout | +--------+ +------------+ +-----+ +-------------------+ +----+ +-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |---> - +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | | + +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | | | +--------+ +------------+ +-----+ | +-------------------+ +----+ | | | +--+ +---------------+ | - |____|÷M|___|VCO Loop Divide|__________| - | | |(VLD)(÷4, ÷16) | + |____|÷M|___|VCO Loop Divide|__________| + | | |(VLD)(÷4, ÷16) | +--+ +---------------+ **************************************************************************** that is the hardware >= 69000 we have to manage +---------+ +--+ - | REFCLK |__|÷N|__ + | REFCLK |__|÷N|__ | 14.3MHz | | | | +---------+ +--+ | __________________| @@ -652,12 +652,12 @@ FindBestPQFittingMN (unsigned int p, unsigned int q, unsigned int mnmin, | fvco fout | +--------+ +------------+ +-----+ +-------------------+ +----+ +-| Phase |__|Charge Pump |__| VCO |_____|Post Divisor (PD) |___|CLK |---> - +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | | + +-| Detect | |& Filter VCO| | | | |÷1, 2, 4, 8, 16, 32| | | | +--------+ +------------+ +-----+ | +-------------------+ +----+ | | | +--+ +---------------+ | - |____|÷M|___|VCO Loop Divide|__________| - | | |(VLD)(÷1, ÷4) | + |____|÷M|___|VCO Loop Divide|__________| + | | |(VLD)(÷1, ÷4) | +--+ +---------------+ |