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| author | Neil Armstrong <narmstrong@baylibre.com> | 2018-07-24 17:45:28 +0200 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-01-31 09:35:01 +0100 |
| commit | 3bed42209404f91f3e0efaf7f9b3c9a989beb922 (patch) | |
| tree | 11dc0a035643757f28e8cfaf51c03322561d4d5e /drivers/video/meson/meson_canvas.c | |
| parent | 56dd8d87e5034bf18fbc6d7c248f28f6eb484a9b (diff) | |
video: Add Meson Video Processing Unit Driver
This adds video output support for Amlogic GXBB/GXL/GXM chips.
The supported ports are CVBS and HDMI (based on DW_HDMI).
When using HDMI, only DMT modes are supported.
There is support for simple-framebuffer (CONFIG_VIDEO_DT_SIMPLEFB)
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jorge Ramire-Ortiz <jramirez@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
[narmstrong: fixed defines alignment in meson_canvas.c]
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Diffstat (limited to 'drivers/video/meson/meson_canvas.c')
| -rw-r--r-- | drivers/video/meson/meson_canvas.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/video/meson/meson_canvas.c b/drivers/video/meson/meson_canvas.c new file mode 100644 index 0000000000..b71cbfcc0b --- /dev/null +++ b/drivers/video/meson/meson_canvas.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Amlogic Meson Video Processing Unit driver + * + * Copyright (c) 2018 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson_vpu.h" + +/* DMC Registers */ +#define DMC_CAV_LUT_DATAL 0x48 /* 0x12 offset in data sheet */ +#define CANVAS_WIDTH_LBIT 29 +#define CANVAS_WIDTH_LWID 3 +#define DMC_CAV_LUT_DATAH 0x4c /* 0x13 offset in data sheet */ +#define CANVAS_WIDTH_HBIT 0 +#define CANVAS_HEIGHT_BIT 9 +#define CANVAS_BLKMODE_BIT 24 +#define DMC_CAV_LUT_ADDR 0x50 /* 0x14 offset in data sheet */ +#define CANVAS_LUT_WR_EN (0x2 << 8) +#define CANVAS_LUT_RD_EN (0x1 << 8) + +void meson_canvas_setup(struct meson_vpu_priv *priv, + u32 canvas_index, u32 addr, + u32 stride, u32 height, + unsigned int wrap, + unsigned int blkmode) +{ + dmc_write(DMC_CAV_LUT_DATAL, + (((addr + 7) >> 3)) | + (((stride + 7) >> 3) << CANVAS_WIDTH_LBIT)); + + dmc_write(DMC_CAV_LUT_DATAH, + ((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) << + CANVAS_WIDTH_HBIT) | + (height << CANVAS_HEIGHT_BIT) | + (wrap << 22) | + (blkmode << CANVAS_BLKMODE_BIT)); + + dmc_write(DMC_CAV_LUT_ADDR, + CANVAS_LUT_WR_EN | canvas_index); + + /* Force a read-back to make sure everything is flushed. */ + dmc_read(DMC_CAV_LUT_DATAH); +} |