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authorSimon Glass <sjg@chromium.org>2012-10-17 13:24:57 +0000
committerTom Warren <twarren@nvidia.com>2012-11-19 08:15:39 -0700
commit44706a87654bae810cc0740e9cafde134c5796f1 (patch)
treecfb8a61f70c33d648f9aff619c397eefbfa39ff2 /drivers/video/tegra.c
parentad16617f74326ee860243ba0aca6b7a01dd25a1f (diff)
tegra: Support control of cache settings for LCD
Add support for selecting the required cache mode for the LCD: off, write-through or write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers/video/tegra.c')
-rw-r--r--drivers/video/tegra.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index ab26ad0958..750a283438 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -146,6 +146,7 @@ static void update_panel_size(struct fdt_disp_config *config)
void lcd_ctrl_init(void *lcdbase)
{
int line_length, size;
+ int type = DCACHE_OFF;
assert(disp_config);
@@ -161,6 +162,16 @@ void lcd_ctrl_init(void *lcdbase)
update_panel_size(disp_config);
size = lcd_get_size(&line_length);
+ /* Set up the LCD caching as requested */
+ if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
+ type = DCACHE_WRITETHROUGH;
+ else if (config.cache_type & FDT_LCD_CACHE_WRITE_BACK)
+ type = DCACHE_WRITEBACK;
+ mmu_set_region_dcache_behaviour(disp_config->frame_buffer, size, type);
+
+ /* Enable flushing after LCD writes if requested */
+ lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH);
+
debug("LCD frame buffer at %p\n", lcd_base);
}