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authorTom Rini <trini@konsulko.com>2016-01-25 10:40:38 -0500
committerTom Rini <trini@konsulko.com>2016-01-25 10:40:38 -0500
commit2218c54bc13c8045903afc05d1364439a230da1f (patch)
tree04c07b31c7953846b907fab4a4609a38e312b4ab /drivers
parentcc4228f9d69f58495c2404adba9145bb36e613bf (diff)
parented3fb1fb22fb9e0e786c58c2d80cd030b89b9b7d (diff)
Merge branch 'master' of git://git.denx.de/u-boot-imx
Diffstat (limited to 'drivers')
-rw-r--r--drivers/dma/apbh_dma.c2
-rw-r--r--drivers/mtd/nand/mxs_nand.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 22defcd7d9..a6dc935114 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -215,7 +215,7 @@ static int mxs_dma_reset(int channel)
#if defined(CONFIG_MX23)
uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6))
+#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
#endif
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index f15cf36c88..ba019a0763 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -30,7 +30,7 @@
#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512
-#if defined(CONFIG_MX6)
+#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 2
#else
#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 0
@@ -152,7 +152,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
int max_ecc_strength_supported;
/* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
- if (is_cpu_type(MXC_CPU_MX6SX))
+ if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7))
max_ecc_strength_supported = 62;
else
max_ecc_strength_supported = 40;