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authorTom Rini <trini@konsulko.com>2019-07-29 17:59:15 -0400
committerTom Rini <trini@konsulko.com>2019-07-29 17:59:15 -0400
commit333755ef7b6f824366eed37ae068c20a4f25a123 (patch)
tree02adfef9881366ccb52a50ae085e2682fa5f9037 /drivers
parent2d64a0f7e952f54375702fb2b854461e402ded9d (diff)
parentc1c564af5200dd50bfa4a2f2e9a6c73d10de691c (diff)
Merge branch '2019-07-29-ti-imports'
- More DaVinci DM migration, drop am18xx EVM platform - Keystone bug fix
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/Kconfig13
-rw-r--r--drivers/i2c/Makefile1
-rw-r--r--drivers/i2c/i2c-uclass-compat.c128
-rw-r--r--drivers/mtd/nand/raw/davinci_nand.c48
4 files changed, 47 insertions, 143 deletions
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 4772db3837..03d2fed341 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -12,18 +12,7 @@ config DM_I2C
write and speed, is implemented with the bus drivers operations,
which provide methods for bus setting and data transfer. Each chip
device (bus child) info is kept as parent platdata. The interface
- is defined in include/i2c.h. When i2c bus driver supports the i2c
- uclass, but the device drivers not, then DM_I2C_COMPAT config can
- be used as compatibility layer.
-
-config DM_I2C_COMPAT
- bool "Enable I2C compatibility layer"
- depends on DM
- help
- Enable old-style I2C functions for compatibility with existing code.
- This option can be enabled as a temporary measure to avoid needing
- to convert all code for a board in a single commit. It should not
- be enabled for any board in an official release.
+ is defined in include/i2c.h.
config I2C_CROS_EC_TUNNEL
tristate "Chrome OS EC tunnel I2C bus"
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index dc40055efb..c2f75d8755 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -3,7 +3,6 @@
# (C) Copyright 2000-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-$(CONFIG_DM_I2C) += i2c-uclass.o
-obj-$(CONFIG_DM_I2C_COMPAT) += i2c-uclass-compat.o
obj-$(CONFIG_DM_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o
obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o
diff --git a/drivers/i2c/i2c-uclass-compat.c b/drivers/i2c/i2c-uclass-compat.c
deleted file mode 100644
index b3ade88113..0000000000
--- a/drivers/i2c/i2c-uclass-compat.c
+++ /dev/null
@@ -1,128 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2014 Google, Inc
- */
-
-#include <common.h>
-#include <dm.h>
-#include <errno.h>
-#include <i2c.h>
-
-static int cur_busnum __attribute__((section(".data")));
-
-static int i2c_compat_get_device(uint chip_addr, int alen,
- struct udevice **devp)
-{
- struct dm_i2c_chip *chip;
- int ret;
-
- ret = i2c_get_chip_for_busnum(cur_busnum, chip_addr, alen, devp);
- if (ret)
- return ret;
- chip = dev_get_parent_platdata(*devp);
- if (chip->offset_len != alen) {
- printf("I2C chip %x: requested alen %d does not match chip offset_len %d\n",
- chip_addr, alen, chip->offset_len);
- return -EADDRNOTAVAIL;
- }
-
- return 0;
-}
-
-int i2c_probe(uint8_t chip_addr)
-{
- struct udevice *bus, *dev;
- int ret;
-
- ret = uclass_get_device_by_seq(UCLASS_I2C, cur_busnum, &bus);
- if (ret) {
- debug("Cannot find I2C bus %d: err=%d\n", cur_busnum, ret);
- return ret;
- }
-
- if (!bus)
- return -ENOENT;
-
- return dm_i2c_probe(bus, chip_addr, 0, &dev);
-}
-
-int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
- int len)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, alen, &dev);
- if (ret)
- return ret;
-
- return dm_i2c_read(dev, addr, buffer, len);
-}
-
-int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
- int len)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, alen, &dev);
- if (ret)
- return ret;
-
- return dm_i2c_write(dev, addr, buffer, len);
-}
-
-int i2c_get_bus_num_fdt(int node)
-{
- struct udevice *bus;
- int ret;
-
- ret = uclass_get_device_by_of_offset(UCLASS_I2C, node, &bus);
- if (ret)
- return ret;
-
- return bus->seq;
-}
-
-unsigned int i2c_get_bus_num(void)
-{
- return cur_busnum;
-}
-
-int i2c_set_bus_num(unsigned int bus)
-{
- cur_busnum = bus;
-
- return 0;
-}
-
-void i2c_init(int speed, int slaveaddr)
-{
- /* Nothing to do here - the init happens through driver model */
-}
-
-void board_i2c_init(const void *blob)
-{
- /* Nothing to do here - the init happens through driver model */
-}
-
-uint8_t i2c_reg_read(uint8_t chip_addr, uint8_t offset)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, 1, &dev);
- if (ret)
- return 0xff;
- return dm_i2c_reg_read(dev, offset);
-}
-
-void i2c_reg_write(uint8_t chip_addr, uint8_t offset, uint8_t val)
-{
- struct udevice *dev;
- int ret;
-
- ret = i2c_compat_get_device(chip_addr, 1, &dev);
- if (!ret)
- dm_i2c_reg_write(dev, offset, val);
-}
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index cfa9b535c8..33c2f16be8 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -31,6 +31,7 @@
#include <common.h>
#include <asm/io.h>
#include <nand.h>
+#include <dm/uclass.h>
#include <asm/ti-common/davinci_nand.h>
/* Definitions for 4-bit hardware ECC */
@@ -730,7 +731,7 @@ static int nand_davinci_dev_ready(struct mtd_info *mtd)
return __raw_readl(&davinci_emif_regs->nandfsr) & 0x1;
}
-void davinci_nand_init(struct nand_chip *nand)
+static void davinci_nand_init(struct nand_chip *nand)
{
#if defined CONFIG_KEYSTONE_RBL_NAND
int i;
@@ -785,10 +786,53 @@ void davinci_nand_init(struct nand_chip *nand)
nand->dev_ready = nand_davinci_dev_ready;
}
-int board_nand_init(struct nand_chip *chip) __attribute__((weak));
+#ifdef CONFIG_SYS_NAND_SELF_INIT
+static int davinci_nand_probe(struct udevice *dev)
+{
+ struct nand_chip *nand = dev_get_priv(dev);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret;
+
+ nand->IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand->IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
+
+ davinci_nand_init(nand);
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret)
+ return ret;
+
+ return nand_register(0, mtd);
+}
+
+static const struct udevice_id davinci_nand_ids[] = {
+ { .compatible = "ti,davinci-nand" },
+ { }
+};
+
+U_BOOT_DRIVER(davinci_nand) = {
+ .name = "davinci-nand",
+ .id = UCLASS_MTD,
+ .of_match = davinci_nand_ids,
+ .probe = davinci_nand_probe,
+ .priv_auto_alloc_size = sizeof(struct nand_chip),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int ret;
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_GET_DRIVER(davinci_nand), &dev);
+ if (ret && ret != -ENODEV)
+ pr_err("Failed to initialize %s: %d\n", dev->name, ret);
+}
+#else
+int board_nand_init(struct nand_chip *chip) __attribute__((weak));
int board_nand_init(struct nand_chip *chip)
{
davinci_nand_init(chip);
return 0;
}
+#endif /* CONFIG_SYS_NAND_SELF_INIT */