Merge branch 'master' of git://git.denx.de/u-boot-sunxi

- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai)

6 files changed, 153 insertions, 55 deletions

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 844b87cc33..79b3b0494c 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -54,28 +54,20 @@ static int clk_of_xlate_default(struct clk *clk,
 	return 0;
 }
 
-static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
-				   int index, struct clk *clk)
+static int clk_get_by_index_tail(int ret, ofnode node,
+				 struct ofnode_phandle_args *args,
+				 const char *list_name, int index,
+				 struct clk *clk)
 {
-	int ret;
-	struct ofnode_phandle_args args;
 	struct udevice *dev_clk;
 	const struct clk_ops *ops;
 
-	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
-
 	assert(clk);
 	clk->dev = NULL;
+	if (ret)
+		goto err;
 
-	ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
-					 index, &args);
-	if (ret) {
-		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
-		      __func__, ret);
-		return ret;
-	}
-
-	ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
+	ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
 	if (ret) {
 		debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
 		      __func__, ret);
@@ -87,20 +79,67 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 	ops = clk_dev_ops(dev_clk);
 
 	if (ops->of_xlate)
-		ret = ops->of_xlate(clk, &args);
+		ret = ops->of_xlate(clk, args);
 	else
-		ret = clk_of_xlate_default(clk, &args);
+		ret = clk_of_xlate_default(clk, args);
 	if (ret) {
 		debug("of_xlate() failed: %d\n", ret);
 		return ret;
 	}
 
 	return clk_request(dev_clk, clk);
+err:
+	debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
+	      __func__, ofnode_get_name(node), list_name, index, ret);
+	return ret;
+}
+
+static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
+				   int index, struct clk *clk)
+{
+	int ret;
+	struct ofnode_phandle_args args;
+
+	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
+
+	assert(clk);
+	clk->dev = NULL;
+
+	ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
+					 index, &args);
+	if (ret) {
+		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
+		      __func__, ret);
+		return ret;
+	}
+
+
+	return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
+				     index > 0, clk);
 }
 
 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 {
-	return clk_get_by_indexed_prop(dev, "clocks", index, clk);
+	struct ofnode_phandle_args args;
+	int ret;
+
+	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
+					 index, &args);
+
+	return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
+				     index > 0, clk);
+}
+
+int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
+{
+	struct ofnode_phandle_args args;
+	int ret;
+
+	ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
+					     index > 0, &args);
+
+	return clk_get_by_index_tail(ret, node, &args, "clocks",
+				     index > 0, clk);
 }
 
 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index e1b5f8e6a9..2d47ebc6b1 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -28,10 +28,10 @@
  * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
 #include <clk.h>
-#include <common.h>
 #include <div64.h>
 #include <dm.h>
 #include <errno.h>
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 98bd7a5823..c0a440886e 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -138,7 +138,9 @@ struct emac_eth_dev {
 	struct phy_device *phydev;
 	struct mii_dev *bus;
 	struct clk tx_clk;
+	struct clk ephy_clk;
 	struct reset_ctl tx_rst;
+	struct reset_ctl ephy_rst;
 #ifdef CONFIG_DM_GPIO
 	struct gpio_desc reset_gpio;
 #endif
@@ -653,7 +655,6 @@ static int sun8i_eth_write_hwaddr(struct udevice *dev)
 
 static int sun8i_emac_board_setup(struct emac_eth_dev *priv)
 {
-	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	int ret;
 
 	ret = clk_enable(&priv->tx_clk);
@@ -670,16 +671,20 @@ static int sun8i_emac_board_setup(struct emac_eth_dev *priv)
 		}
 	}
 
-	if (priv->variant == H3_EMAC) {
-		/* Only H3/H5 have clock controls for internal EPHY */
-		if (priv->use_internal_phy) {
-			/* Set clock gating for ephy */
-			setbits_le32(&ccm->bus_gate4,
-				     BIT(AHB_GATE_OFFSET_EPHY));
-
-			/* Deassert EPHY */
-			setbits_le32(&ccm->ahb_reset2_cfg,
-				     BIT(AHB_RESET_OFFSET_EPHY));
+	/* Only H3/H5 have clock controls for internal EPHY */
+	if (clk_valid(&priv->ephy_clk)) {
+		ret = clk_enable(&priv->ephy_clk);
+		if (ret) {
+			dev_err(dev, "failed to enable EPHY TX clock\n");
+			return ret;
+		}
+	}
+
+	if (reset_valid(&priv->ephy_rst)) {
+		ret = reset_deassert(&priv->ephy_rst);
+		if (ret) {
+			dev_err(dev, "failed to deassert EPHY TX clock\n");
+			return ret;
 		}
 	}
 
@@ -839,6 +844,44 @@ static const struct eth_ops sun8i_emac_eth_ops = {
 	.stop                   = sun8i_emac_eth_stop,
 };
 
+static int sun8i_get_ephy_nodes(struct emac_eth_dev *priv)
+{
+	int node, ret;
+
+	/* look for mdio-mux node for internal PHY node */
+	node = fdt_path_offset(gd->fdt_blob,
+			"/soc/ethernet@1c30000/mdio-mux/mdio@1/ethernet-phy@1");
+	if (node < 0) {
+		debug("failed to get mdio-mux with internal PHY\n");
+		return node;
+	}
+
+	ret = fdt_node_check_compatible(gd->fdt_blob, node,
+					"allwinner,sun8i-h3-mdio-internal");
+	if (ret < 0) {
+		debug("failed to find mdio-internal node\n");
+		return ret;
+	}
+
+	ret = clk_get_by_index_nodev(offset_to_ofnode(node), 0,
+				     &priv->ephy_clk);
+	if (ret) {
+		dev_err(dev, "failed to get EPHY TX clock\n");
+		return ret;
+	}
+
+	ret = reset_get_by_index_nodev(offset_to_ofnode(node), 0,
+				       &priv->ephy_rst);
+	if (ret) {
+		dev_err(dev, "failed to get EPHY TX reset\n");
+		return ret;
+	}
+
+	priv->use_internal_phy = true;
+
+	return 0;
+}
+
 static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
 {
 	struct sun8i_eth_pdata *sun8i_pdata = dev_get_platdata(dev);
@@ -920,12 +963,9 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
 	}
 
 	if (priv->variant == H3_EMAC) {
-		int parent = fdt_parent_offset(gd->fdt_blob, offset);
-
-		if (parent >= 0 &&
-		    !fdt_node_check_compatible(gd->fdt_blob, parent,
-				"allwinner,sun8i-h3-mdio-internal"))
-			priv->use_internal_phy = true;
+		ret = sun8i_get_ephy_nodes(priv);
+		if (ret)
+			return ret;
 	}
 
 	priv->interface = pdata->phy_interface;
diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 89e39c6b5a..ee1a423ffb 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -29,41 +29,34 @@ static int reset_of_xlate_default(struct reset_ctl *reset_ctl,
 	return 0;
 }
 
-int reset_get_by_index(struct udevice *dev, int index,
-		       struct reset_ctl *reset_ctl)
+static int reset_get_by_index_tail(int ret, ofnode node,
+				   struct ofnode_phandle_args *args,
+				   const char *list_name, int index,
+				   struct reset_ctl *reset_ctl)
 {
-	struct ofnode_phandle_args args;
-	int ret;
 	struct udevice *dev_reset;
 	struct reset_ops *ops;
 
-	debug("%s(dev=%p, index=%d, reset_ctl=%p)\n", __func__, dev, index,
-	      reset_ctl);
+	assert(reset_ctl);
 	reset_ctl->dev = NULL;
-
-	ret = dev_read_phandle_with_args(dev, "resets", "#reset-cells", 0,
-					  index, &args);
-	if (ret) {
-		debug("%s: fdtdec_parse_phandle_with_args() failed: %d\n",
-		      __func__, ret);
+	if (ret)
 		return ret;
-	}
 
-	ret = uclass_get_device_by_ofnode(UCLASS_RESET, args.node,
+	ret = uclass_get_device_by_ofnode(UCLASS_RESET, args->node,
 					  &dev_reset);
 	if (ret) {
 		debug("%s: uclass_get_device_by_ofnode() failed: %d\n",
 		      __func__, ret);
-		debug("%s %d\n", ofnode_get_name(args.node), args.args[0]);
+		debug("%s %d\n", ofnode_get_name(args->node), args->args[0]);
 		return ret;
 	}
 	ops = reset_dev_ops(dev_reset);
 
 	reset_ctl->dev = dev_reset;
 	if (ops->of_xlate)
-		ret = ops->of_xlate(reset_ctl, &args);
+		ret = ops->of_xlate(reset_ctl, args);
 	else
-		ret = reset_of_xlate_default(reset_ctl, &args);
+		ret = reset_of_xlate_default(reset_ctl, args);
 	if (ret) {
 		debug("of_xlate() failed: %d\n", ret);
 		return ret;
@@ -78,6 +71,32 @@ int reset_get_by_index(struct udevice *dev, int index,
 	return 0;
 }
 
+int reset_get_by_index(struct udevice *dev, int index,
+		       struct reset_ctl *reset_ctl)
+{
+	struct ofnode_phandle_args args;
+	int ret;
+
+	ret = dev_read_phandle_with_args(dev, "resets", "#reset-cells", 0,
+					 index, &args);
+
+	return reset_get_by_index_tail(ret, dev_ofnode(dev), &args, "resets",
+				       index > 0, reset_ctl);
+}
+
+int reset_get_by_index_nodev(ofnode node, int index,
+			     struct reset_ctl *reset_ctl)
+{
+	struct ofnode_phandle_args args;
+	int ret;
+
+	ret = ofnode_parse_phandle_with_args(node, "resets", "#reset-cells", 0,
+					     index > 0, &args);
+
+	return reset_get_by_index_tail(ret, node, &args, "resets",
+				       index > 0, reset_ctl);
+}
+
 int reset_get_bulk(struct udevice *dev, struct reset_ctl_bulk *bulk)
 {
 	int i, ret, err, count;
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
index 537bc7a975..fdfef69aaa 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -3,8 +3,8 @@
  * Copyright (C) 2018 Anup Patel <anup@brainfault.org>
  */
 
-#include <clk.h>
 #include <common.h>
+#include <clk.h>
 #include <debug_uart.h>
 #include <dm.h>
 #include <errno.h>
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index af96c6d21e..e0cc323444 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -6,8 +6,8 @@
  * Author: Rick Chen (rick@andestech.com)
  */
 
-#include <clk.h>
 #include <common.h>
+#include <clk.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>