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authorXiaowei Bao <xiaowei.bao@nxp.com>2018-10-26 09:56:26 +0800
committerYork Sun <york.sun@nxp.com>2019-01-17 13:17:40 -0800
commit59a557f360a84f475fc10beabe14379322abf2ae (patch)
tree40dcbf26ee7e7ccd97d772b1dd4855ee9621e42c /drivers
parent87e0d2b9ac6e82dd2cb5164f029396a44fbbbe82 (diff)
pci: layerscape: Add the dts fixup for EP and RC
Add the dts fixup when PCI controller work diffferent mode. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/pcie_layerscape_fixup.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index 1a17bd98aa..089e031724 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -218,7 +218,7 @@ static void fdt_fixup_pcie(void *blob)
}
#endif
-static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
+static void ft_pcie_rc_fix(void *blob, struct ls_pcie *pcie)
{
int off;
uint svr;
@@ -243,12 +243,33 @@ static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
return;
}
- if (pcie->enabled)
+ if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_BRIDGE)
+ fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
+ else
+ fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
+}
+
+static void ft_pcie_ep_fix(void *blob, struct ls_pcie *pcie)
+{
+ int off;
+
+ off = fdt_node_offset_by_compat_reg(blob, "fsl,ls-pcie-ep",
+ pcie->dbi_res.start);
+ if (off < 0)
+ return;
+
+ if (pcie->enabled && pcie->mode == PCI_HEADER_TYPE_NORMAL)
fdt_set_node_status(blob, off, FDT_STATUS_OKAY, 0);
else
fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
}
+static void ft_pcie_ls_setup(void *blob, struct ls_pcie *pcie)
+{
+ ft_pcie_ep_fix(blob, pcie);
+ ft_pcie_rc_fix(blob, pcie);
+}
+
/* Fixup Kernel DT for PCIe */
void ft_pci_setup(void *blob, bd_t *bd)
{