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authorBin Meng <bmeng.cn@gmail.com>2015-09-09 23:20:28 -0700
committerSimon Glass <sjg@chromium.org>2015-09-16 19:53:53 -0600
commit5bf0f7f65d40447cec0f3d91abda59eb4a4f88af (patch)
treeda3aae3084ca4a484534ec3ca15edc98eaf62d1c /drivers
parent554778c240385b09dc01140865fe3f5d04806456 (diff)
x86: galileo: Add PCIe root port IRQ routing
Now we have enabled PCIe root port on Quark SoC, add its PIRQ routing information in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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