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authorTom Rini <trini@konsulko.com>2020-01-21 18:10:28 -0500
committerTom Rini <trini@konsulko.com>2020-01-21 18:10:28 -0500
commit75dd53055a33f5bdb8ee2f53ce76c67052dfca7e (patch)
tree2ee907d73cbd5882455cc62fc9ac5724b983112e /drivers
parentad647690b1346f57847d4c9251293293af8928a8 (diff)
parent584a3d2622e9107d09434b05df8b6c50e25fe73f (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Add run-time board detection with TLV EEPROM support (Baruch)
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ddr/marvell/a38x/ddr3_training.c10
-rw-r--r--drivers/ddr/marvell/a38x/ddr_topology_def.h3
2 files changed, 11 insertions, 2 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c
index c7be700d64..9718f18c30 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training.c
@@ -280,8 +280,14 @@ int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable)
{
u32 data, addr_hi, data_high;
u32 mem_index;
+ u32 clk_enable;
struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
+ if (tm->clk_enable & (1 << cs_num))
+ clk_enable = 1;
+ else
+ clk_enable = enable;
+
if (enable == 1) {
data = (tm->interface_params[if_id].bus_width ==
MV_DDR_DEV_WIDTH_8BIT) ? 0 : 1;
@@ -316,13 +322,13 @@ int ddr3_tip_configure_cs(u32 dev_num, u32 if_id, u32 cs_num, u32 enable)
case 2:
CHECK_STATUS(ddr3_tip_if_write
(dev_num, ACCESS_TYPE_UNICAST, if_id,
- DUNIT_CTRL_LOW_REG, (enable << (cs_num + 11)),
+ DUNIT_CTRL_LOW_REG, (clk_enable << (cs_num + 11)),
1 << (cs_num + 11)));
break;
case 3:
CHECK_STATUS(ddr3_tip_if_write
(dev_num, ACCESS_TYPE_UNICAST, if_id,
- DUNIT_CTRL_LOW_REG, (enable << 15), 1 << 15));
+ DUNIT_CTRL_LOW_REG, (clk_enable << 15), 1 << 15));
break;
}
diff --git a/drivers/ddr/marvell/a38x/ddr_topology_def.h b/drivers/ddr/marvell/a38x/ddr_topology_def.h
index e6fe8a0428..950f296ff9 100644
--- a/drivers/ddr/marvell/a38x/ddr_topology_def.h
+++ b/drivers/ddr/marvell/a38x/ddr_topology_def.h
@@ -124,6 +124,9 @@ struct mv_ddr_topology_map {
/* electrical parameters */
unsigned int electrical_data[MV_DDR_EDATA_LAST];
+
+ /* Clock enable mask */
+ u32 clk_enable;
};
enum mv_ddr_iface_mode {