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authorMarek Vasut <marek.vasut+renesas@gmail.com>2019-05-07 21:52:47 +0200
committerMarek Vasut <marex@denx.de>2019-05-10 22:43:18 +0200
commit7de3ea8b98a531c516505f07902e56077bf78816 (patch)
tree2cc2816ddca0073fd77d29e812dccc9f9df3d972 /drivers
parent54eac8b3a3cc4c05d981ecefc8bcd5151f0d928c (diff)
sh: sh2: Remove CPU support
This CPU core is old, no boards using the CPU are left in mainline, it has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/serial_sh.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 56472c5419..f13deec72a 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -106,14 +106,7 @@ struct uart_port {
/* TIE=0,RIE=0,TE=1,RE=1,REIE=1,CKE1=1 */
# define SCSCR_INIT(port) 0x3a
-#elif defined(CONFIG_CPU_SH7203) || \
- defined(CONFIG_CPU_SH7264)
-# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
-# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
-# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
-# define SCSPTR3 0xfffe9820 /* 16 bit SCIF */
-# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
-#elif defined(CONFIG_CPU_SH7269) || defined(CONFIG_RZA1)
+#elif defined(CONFIG_RZA1)
# define SCSPTR0 0xe8007020 /* 16 bit SCIF */
# define SCSPTR1 0xe8007820 /* 16 bit SCIF */
# define SCSPTR2 0xe8008020 /* 16 bit SCIF */