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authorSimon Glass <sjg@chromium.org>2015-07-02 18:15:55 -0600
committerSimon Glass <sjg@chromium.org>2015-08-05 21:06:11 -0600
commit7fb57396e632126867c360e0dc0700db3d059aef (patch)
treeea84e6ad697eaa6efb6820d243e0d2fb15f19dea /drivers
parentbf6e702232e3b8c38fe0934c1f0240958eaabed3 (diff)
exynos: Enable the debug UART in SPL
As a debugging aid, allow UART3 to be used as a debug UART in SPL. This is a precursor to proper UART support, which requires a substantial refactor. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/serial_s5p.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 4a553a37b8..21cb566c29 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -85,6 +85,7 @@ static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
writeb(val % 16, &uart->rest.value);
}
+#ifndef CONFIG_SPL_BUILD
int s5p_serial_setbrg(struct udevice *dev, int baudrate)
{
struct s5p_serial_platdata *plat = dev->platdata;
@@ -200,6 +201,7 @@ U_BOOT_DRIVER(serial_s5p) = {
.ops = &s5p_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
};
+#endif
#ifdef CONFIG_DEBUG_UART_S5P