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authorShiraz Hashim <shiraz.hashim@st.com>2012-05-07 13:00:24 +0530
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:39 +0200
commita59c7b37b908639f9daa7fe50d4646b3947e2d62 (patch)
treea5e8580c7fe366c5a98b1212f0d216127d7b097b /drivers
parent0befe7d7a396339067ccb7018ab69a097ff62cf4 (diff)
st_smi: Move status register read before modifying ctrl register
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/st_smi.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index 088c7c7b7c..8c276036af 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -148,7 +148,7 @@ static ulong flash_get_size(ulong base, int banknum)
*/
static int smi_read_sr(int bank)
{
- u32 ctrlreg1;
+ u32 ctrlreg1, val;
/* store the CTRL REG1 state */
ctrlreg1 = readl(&smicntl->smi_cr1);
@@ -163,10 +163,12 @@ static int smi_read_sr(int bank)
if (smi_wait_xfer_finish(XFER_FINISH_TOUT))
return -1;
+ val = readl(&smicntl->smi_sr);
+
/* Restore the CTRL REG1 state */
writel(ctrlreg1, &smicntl->smi_cr1);
- return readl(&smicntl->smi_sr);
+ return val;
}
/*