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authorYe Li <ye.li@nxp.com>2019-08-14 11:31:31 +0000
committerStefano Babic <sbabic@denx.de>2019-10-08 16:36:37 +0200
commitb866b9278a3b87e7f70f026785c002b109258022 (patch)
tree0c5fbfa64ffaa17419b1bbed0cd854f25577e3d4 /drivers
parent7949576664ac8fe8c0da08fcd8c611b9616719f1 (diff)
spi: fsl_qspi: Update write data size for page program LUT
The write data size can be overwritten by writing to the IDATSZ field of IPCR register. Since the driver always updates the IDATSZ in page program operation. Set the LUT data size to 0 to align the codes with iMX. Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/fsl_qspi.c12
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index e877d99bb0..5706569834 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -273,19 +273,9 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) |
PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
#endif
-#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
- defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D)
- /*
- * To MX6SX, OPRND0(TX_BUFFER_SIZE) can not work correctly.
- * So, Use IDATSZ in IPCR to determine the size and here set 0.
- */
+ /* Use IDATSZ in IPCR to determine the size and here set 0. */
qspi_write32(priv->flags, &regs->lut[lut_base + 1], OPRND0(0) |
PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-#else
- qspi_write32(priv->flags, &regs->lut[lut_base + 1],
- OPRND0(TX_BUFFER_SIZE) |
- PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-#endif
qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);