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authorWang Huan <b18965@freescale.com>2014-09-05 13:52:39 +0800
committerYork Sun <yorksun@freescale.com>2014-09-08 10:30:33 -0700
commitc82e9de400ee36038c76be67c5a6fb39c165ac1c (patch)
tree7da71ffa7005b4a59dd53aeb27e7df17be952c51 /drivers
parent52d00a812a29974e660f64a8839ddb550dca5290 (diff)
esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macros
For LS102xA, the processor is in little-endian mode, while esdhc IP is in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE are added. So accessing ESDHC registers can be determined by ESDHC IP's endian mode. Signed-off-by: Alison Wang <alison.wang@freescale.com>
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