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authorChaitanya Sakinam <chaitanya.sakinam@nxp.com>2020-06-09 16:21:48 +0530
committerPriyanka Jain <priyanka.jain@nxp.com>2020-07-27 14:16:28 +0530
commitcb1de6067aae8bd3dc8161db0d92f19a4e60942a (patch)
tree376a6d3a319def6b3ecdade8ffdcd31501e3eebe /drivers
parent3fba2311a3c4bbe6301fbdfbdb97f8ecba75778a (diff)
armv8: ls1012a: RGMII ports require internal delay
The correct setting for the RGMII ports on LS1012ARDB is to enable delay on both Rx and Tx so the interface mode used should be PHY_INTERFACE_MODE_RGMII_ID Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Signed-off-by: Anji J <anji.jagarlmudi@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/pfe_eth/pfe_eth.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index 718e24f14d..e49bf4a6f3 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -33,7 +33,7 @@ struct gemac_s gem_info[] = {
/* phy iface */
.phy_address = CONFIG_PFE_EMAC2_PHY_ADDR,
- .phy_mode = PHY_INTERFACE_MODE_RGMII_TXID,
+ .phy_mode = PHY_INTERFACE_MODE_RGMII_ID,
},
};