Merge branch 'master' of git://git.denx.de/u-boot

18 files changed, 129 insertions, 82 deletions

diff --git a/drivers/core/device.c b/drivers/core/device.c
index 0bc04d4876..833a803696 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -289,8 +289,12 @@ int device_probe_child(struct udevice *dev, void *parent_priv)
 
 	dev->flags |= DM_FLAG_ACTIVATED;
 
-	/* continue regardless of the result of pinctrl */
-	pinctrl_select_state(dev, "default");
+	/*
+	 * Process pinctrl for everything except the root device, and
+	 * continue regardless of the result of pinctrl.
+	 */
+	if (dev->parent)
+		pinctrl_select_state(dev, "default");
 
 	ret = uclass_pre_probe_device(dev);
 	if (ret)
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index 17fcfbf4d3..0f22b238ba 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -341,18 +341,22 @@ static int gpio_exynos_bind(struct udevice *parent)
 		plat = calloc(1, sizeof(*plat));
 		if (!plat)
 			return -ENOMEM;
-		reg = fdtdec_get_addr(blob, node, "reg");
-		if (reg != FDT_ADDR_T_NONE)
-			bank = (struct s5p_gpio_bank *)((ulong)base + reg);
-		plat->bank = bank;
-		plat->bank_name = fdt_get_name(blob, node, NULL);
-		debug("dev at %p: %s\n", bank, plat->bank_name);
 
+		plat->bank_name = fdt_get_name(blob, node, NULL);
 		ret = device_bind(parent, parent->driver,
-					plat->bank_name, plat, -1, &dev);
+				  plat->bank_name, plat, -1, &dev);
 		if (ret)
 			return ret;
+
 		dev->of_offset = node;
+
+		reg = dev_get_addr(dev);
+		if (reg != FDT_ADDR_T_NONE)
+			bank = (struct s5p_gpio_bank *)((ulong)base + reg);
+
+		plat->bank = bank;
+
+		debug("dev at %p: %s\n", bank, plat->bank_name);
 	}
 
 	return 0;
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 4921f0ff42..8e880e276f 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -1,6 +1,6 @@
 /*
  * NVIDIA Tegra20 GPIO handling.
- *  (C) Copyright 2010-2012
+ *  (C) Copyright 2010-2012,2015
  *  NVIDIA Corporation <www.nvidia.com>
  *
  * SPDX-License-Identifier:	GPL-2.0+
@@ -25,12 +25,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-enum {
-	TEGRA_CMD_INFO,
-	TEGRA_CMD_PORT,
-	TEGRA_CMD_OUTPUT,
-	TEGRA_CMD_INPUT,
-};
+static const int CONFIG_SFIO = 0;
+static const int CONFIG_GPIO = 1;
+static const int DIRECTION_INPUT = 0;
+static const int DIRECTION_OUTPUT = 1;
 
 struct tegra_gpio_platdata {
 	struct gpio_ctlr_bank *bank;
@@ -44,7 +42,7 @@ struct tegra_port_info {
 	int base_gpio;		/* Port number for this port (0, 1,.., n-1) */
 };
 
-/* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */
+/* Return config of pin 'gpio' as GPIO (1) or SFIO (0) */
 static int get_config(unsigned gpio)
 {
 	struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
@@ -53,15 +51,15 @@ static int get_config(unsigned gpio)
 	int type;
 
 	u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
-	type =  (u >> GPIO_BIT(gpio)) & 1;
+	type = (u >> GPIO_BIT(gpio)) & 1;
 
 	debug("get_config: port = %d, bit = %d is %s\n",
 		GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
 
-	return type;
+	return type ? CONFIG_GPIO : CONFIG_SFIO;
 }
 
-/* Config pin 'gpio' as GPIO or SFPIO, based on 'type' */
+/* Config pin 'gpio' as GPIO or SFIO, based on 'type' */
 static void set_config(unsigned gpio, int type)
 {
 	struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
@@ -72,7 +70,7 @@ static void set_config(unsigned gpio, int type)
 		GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO");
 
 	u = readl(&bank->gpio_config[GPIO_PORT(gpio)]);
-	if (type)				/* GPIO */
+	if (type != CONFIG_SFIO)
 		u |= 1 << GPIO_BIT(gpio);
 	else
 		u &= ~(1 << GPIO_BIT(gpio));
@@ -93,7 +91,7 @@ static int get_direction(unsigned gpio)
 	debug("get_direction: port = %d, bit = %d, %s\n",
 		GPIO_FULLPORT(gpio), GPIO_BIT(gpio), dir ? "OUT" : "IN");
 
-	return dir;
+	return dir ? DIRECTION_OUTPUT : DIRECTION_INPUT;
 }
 
 /* Config GPIO pin 'gpio' as input or output (OE) as per 'output' */
@@ -107,7 +105,7 @@ static void set_direction(unsigned gpio, int output)
 		GPIO_FULLPORT(gpio), GPIO_BIT(gpio), output ? "OUT" : "IN");
 
 	u = readl(&bank->gpio_dir_out[GPIO_PORT(gpio)]);
-	if (output)
+	if (output != DIRECTION_INPUT)
 		u |= 1 << GPIO_BIT(gpio);
 	else
 		u &= ~(1 << GPIO_BIT(gpio));
@@ -136,24 +134,16 @@ static void set_level(unsigned gpio, int high)
  * Generic_GPIO primitives.
  */
 
-static int tegra_gpio_request(struct udevice *dev, unsigned offset,
-			      const char *label)
-{
-	struct tegra_port_info *state = dev_get_priv(dev);
-
-	/* Configure as a GPIO */
-	set_config(state->base_gpio + offset, 1);
-
-	return 0;
-}
-
 /* set GPIO pin 'gpio' as an input */
 static int tegra_gpio_direction_input(struct udevice *dev, unsigned offset)
 {
 	struct tegra_port_info *state = dev_get_priv(dev);
 
 	/* Configure GPIO direction as input. */
-	set_direction(state->base_gpio + offset, 0);
+	set_direction(state->base_gpio + offset, DIRECTION_INPUT);
+
+	/* Enable the pin as a GPIO */
+	set_config(state->base_gpio + offset, 1);
 
 	return 0;
 }
@@ -169,7 +159,10 @@ static int tegra_gpio_direction_output(struct udevice *dev, unsigned offset,
 	set_level(gpio, value);
 
 	/* Configure GPIO direction as output. */
-	set_direction(gpio, 1);
+	set_direction(gpio, DIRECTION_OUTPUT);
+
+	/* Enable the pin as a GPIO */
+	set_config(state->base_gpio + offset, 1);
 
 	return 0;
 }
@@ -211,16 +204,18 @@ void gpio_config_table(const struct tegra_gpio_config *config, int len)
 	for (i = 0; i < len; i++) {
 		switch (config[i].init) {
 		case TEGRA_GPIO_INIT_IN:
-			gpio_direction_input(config[i].gpio);
+			set_direction(config[i].gpio, DIRECTION_INPUT);
 			break;
 		case TEGRA_GPIO_INIT_OUT0:
-			gpio_direction_output(config[i].gpio, 0);
+			set_level(config[i].gpio, 0);
+			set_direction(config[i].gpio, DIRECTION_OUTPUT);
 			break;
 		case TEGRA_GPIO_INIT_OUT1:
-			gpio_direction_output(config[i].gpio, 1);
+			set_level(config[i].gpio, 1);
+			set_direction(config[i].gpio, DIRECTION_OUTPUT);
 			break;
 		}
-		set_config(config[i].gpio, 1);
+		set_config(config[i].gpio, CONFIG_GPIO);
 	}
 }
 
@@ -254,7 +249,6 @@ static int tegra_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
 }
 
 static const struct dm_gpio_ops gpio_tegra_ops = {
-	.request		= tegra_gpio_request,
 	.direction_input	= tegra_gpio_direction_input,
 	.direction_output	= tegra_gpio_direction_output,
 	.get_value		= tegra_gpio_get_value,
diff --git a/drivers/misc/reset_sandbox.c b/drivers/misc/reset_sandbox.c
index 917121bc5e..2691bb031a 100644
--- a/drivers/misc/reset_sandbox.c
+++ b/drivers/misc/reset_sandbox.c
@@ -40,7 +40,7 @@ static int sandbox_reset_request(struct udevice *dev, enum reset_t type)
 	 * (see the U_BOOT_DEVICE() declaration below) should not do anything.
 	 * If we are that device, return an error.
 	 */
-	if (gd->fdt_blob && dev->of_offset == -1)
+	if (state->fdt_fname && dev->of_offset == -1)
 		return -ENODEV;
 
 	switch (type) {
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 25f18adb67..e717c44216 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -120,17 +120,27 @@ static int mmc_set_mod_clk(struct sunxi_mmc_host *mmchost, unsigned int hz)
 	/* determine delays */
 	if (hz <= 400000) {
 		oclk_dly = 0;
-		sclk_dly = 7;
+		sclk_dly = 0;
 	} else if (hz <= 25000000) {
 		oclk_dly = 0;
 		sclk_dly = 5;
+#ifdef CONFIG_MACH_SUN9I
 	} else if (hz <= 50000000) {
-		oclk_dly = 3;
-		sclk_dly = 5;
+		oclk_dly = 5;
+		sclk_dly = 4;
 	} else {
 		/* hz > 50000000 */
 		oclk_dly = 2;
 		sclk_dly = 4;
+#else
+	} else if (hz <= 50000000) {
+		oclk_dly = 3;
+		sclk_dly = 4;
+	} else {
+		/* hz > 50000000 */
+		oclk_dly = 1;
+		sclk_dly = 4;
+#endif
 	}
 
 	writel(CCM_MMC_CTRL_ENABLE | pll | CCM_MMC_CTRL_SCLK_DLY(sclk_dly) |
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 4372988ed2..4814fa202a 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -558,10 +558,10 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
 		bit_pos  = error_loc[count] % 8;
 		if (byte_pos < SECTOR_BYTES) {
 			dat[byte_pos] ^= 1 << bit_pos;
-			printf("nand: bit-flip corrected @data=%d\n", byte_pos);
+			debug("nand: bit-flip corrected @data=%d\n", byte_pos);
 		} else if (byte_pos < error_max) {
 			read_ecc[byte_pos - SECTOR_BYTES] ^= 1 << bit_pos;
-			printf("nand: bit-flip corrected @oob=%d\n", byte_pos -
+			debug("nand: bit-flip corrected @oob=%d\n", byte_pos -
 								SECTOR_BYTES);
 		} else {
 			err = -EBADMSG;
@@ -663,7 +663,7 @@ static int omap_correct_data_bch_sw(struct mtd_info *mtd, u_char *data,
 			/* correct data only, not ecc bytes */
 			if (errloc[i] < 8*512)
 				data[errloc[i]/8] ^= 1 << (errloc[i] & 7);
-			printf("corrected bitflip %u\n", errloc[i]);
+			debug("corrected bitflip %u\n", errloc[i]);
 #ifdef DEBUG
 			puts("read_ecc: ");
 			/*
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c
index 5985534e5f..b0e07aa2d0 100644
--- a/drivers/mtd/nand/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/sunxi_nand_spl.c
@@ -356,18 +356,32 @@ static int nand_read_buffer(uint32_t offs, unsigned int size, void *dest,
 
 int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest)
 {
+#if CONFIG_SYS_NAND_U_BOOT_OFFS == CONFIG_SPL_PAD_TO
+	/*
+	 * u-boot-dtb.bin appended to SPL, use syndrome (like the BROM does)
+	 * and try different erase block sizes to find the backup.
+	 */
 	const uint32_t boot_offsets[] = {
 		0 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
 		1 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
 		2 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
 		4 * 1024 * 1024 + CONFIG_SYS_NAND_U_BOOT_OFFS,
 	};
-	int i, syndrome;
-
-	if (CONFIG_SYS_NAND_U_BOOT_OFFS == CONFIG_SPL_PAD_TO)
-		syndrome = 1; /* u-boot-dtb.bin appended to SPL */
-	else
-		syndrome = 0; /* u-boot-dtb.bin on its own partition */
+	const int syndrome = 1;
+#else
+	/*
+	 * u-boot-dtb.bin on its own partition, do not use syndrome, u-boot
+	 * partition sits after 2 eraseblocks (spl, spl-backup), look for
+	 * backup u-boot 1 erase block further.
+	 */
+	const uint32_t eraseblock_size = CONFIG_SYS_NAND_U_BOOT_OFFS / 2;
+	const uint32_t boot_offsets[] = {
+		CONFIG_SYS_NAND_U_BOOT_OFFS,
+		CONFIG_SYS_NAND_U_BOOT_OFFS + eraseblock_size,
+	};
+	const int syndrome = 0;
+#endif
+	int i;
 
 	if (offs == CONFIG_SYS_NAND_U_BOOT_OFFS) {
 		for (i = 0; i < ARRAY_SIZE(boot_offsets); i++) {
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 4a4a3afc92..8f5bdda3d7 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -23,6 +23,7 @@ const struct spi_flash_params spi_flash_params_table[] = {
 	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64, RD_NORM,		    SECT_4K},
 	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128, RD_NORM,		    SECT_4K},
 	{"AT25DF321",      0x1f4701, 0x0,	64 * 1024,    64, RD_NORM,		    SECT_4K},
+	{"AT26DF081A",     0x1f4501, 0x0,	64 * 1024,    16, RD_NORM,		    SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON		/* EON */
 	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64, RD_NORM,			  0},
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 31042a6b6b..bf972dc39b 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -170,7 +170,11 @@ int nc_input_packet(uchar *pkt, struct in_addr src_ip, unsigned dest_port,
 
 static void nc_send_packet(const char *buf, int len)
 {
+#ifdef CONFIG_DM_ETH
+	struct udevice *eth;
+#else
 	struct eth_device *eth;
+#endif
 	int inited = 0;
 	uchar *pkt;
 	uchar *ether;
@@ -183,7 +187,7 @@ static void nc_send_packet(const char *buf, int len)
 		return;
 
 	if (!memcmp(nc_ether, net_null_ethaddr, 6)) {
-		if (eth->state == ETH_STATE_ACTIVE)
+		if (eth_is_active(eth))
 			return;	/* inside net loop */
 		output_packet = buf;
 		output_packet_len = len;
@@ -194,7 +198,7 @@ static void nc_send_packet(const char *buf, int len)
 		return;
 	}
 
-	if (eth->state != ETH_STATE_ACTIVE) {
+	if (!eth_is_active(eth)) {
 		if (eth_is_on_demand_init()) {
 			if (eth_init() < 0)
 				return;
@@ -292,7 +296,11 @@ static int nc_stdio_getc(struct stdio_dev *dev)
 
 static int nc_stdio_tstc(struct stdio_dev *dev)
 {
+#ifdef CONFIG_DM_ETH
+	struct udevice *eth;
+#else
 	struct eth_device *eth;
+#endif
 
 	if (input_recursion)
 		return 0;
@@ -301,7 +309,7 @@ static int nc_stdio_tstc(struct stdio_dev *dev)
 		return 1;
 
 	eth = eth_get_dev();
-	if (eth && eth->state == ETH_STATE_ACTIVE)
+	if (eth_is_active(eth))
 		return 0;	/* inside net loop */
 
 	input_recursion = 1;
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 65c731afb6..a6023f1033 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -571,7 +571,7 @@ static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
 	memset(dev, 0, sizeof(*dev));
 
 	dev->duplex = -1;
-	dev->link = 1;
+	dev->link = 0;
 	dev->interface = interface;
 
 	dev->autoneg = AUTONEG_ENABLE;
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 41d5447f12..79f27c744b 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -185,6 +185,7 @@ void pciauto_setup_device(struct pci_controller *hose,
 #ifndef CONFIG_PCI_ENUM_ONLY
 	/* Configure the expansion ROM address */
 	pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, &header_type);
+	header_type &= 0x7f;
 	if (header_type != PCI_HEADER_TYPE_CARDBUS) {
 		rom_addr = (header_type == PCI_HEADER_TYPE_NORMAL) ?
 			   PCI_ROM_ADDRESS : PCI_ROM_ADDRESS1;
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ccb80d2d1d..ddb725d326 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -111,7 +111,7 @@ config DEBUG_UART_SHIFT
 
 config ROCKCHIP_SERIAL
 	bool "Rockchip on-chip UART support"
-	depends on ARCH_UNIPHIER && DM_SERIAL
+	depends on ARCH_ROCKCHIP && DM_SERIAL
 	help
 	  Select this to enable a debug UART for Rockchip devices. This uses
 	  the ns16550 driver. You will need to #define CONFIG_SYS_NS16550 in
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index fbb665b86f..144716fd91 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -36,6 +36,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SLINK_CMD_ENB			(1 << 31)
 #define SLINK_CMD_GO			(1 << 30)
 #define SLINK_CMD_M_S			(1 << 28)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_LOW	(0 << 24)
+#define SLINK_CMD_IDLE_SCLK_DRIVE_HIGH	(1 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_LOW	(2 << 24)
+#define SLINK_CMD_IDLE_SCLK_PULL_HIGH	(3 << 24)
+#define SLINK_CMD_IDLE_SCLK_MASK	(3 << 24)
 #define SLINK_CMD_CK_SDA		(1 << 21)
 #define SLINK_CMD_CS_POL		(1 << 13)
 #define SLINK_CMD_CS_VAL		(1 << 12)
@@ -331,6 +336,22 @@ static int tegra30_spi_set_speed(struct udevice *bus, uint speed)
 static int tegra30_spi_set_mode(struct udevice *bus, uint mode)
 {
 	struct tegra30_spi_priv *priv = dev_get_priv(bus);
+	struct spi_regs *regs = priv->regs;
+	u32 reg;
+
+	reg = readl(&regs->command);
+
+	/* Set CPOL and CPHA */
+	reg &= ~(SLINK_CMD_IDLE_SCLK_MASK | SLINK_CMD_CK_SDA);
+	if (mode & SPI_CPHA)
+		reg |= SLINK_CMD_CK_SDA;
+
+	if (mode & SPI_CPOL)
+		reg |= SLINK_CMD_IDLE_SCLK_DRIVE_HIGH;
+	else
+		reg |= SLINK_CMD_IDLE_SCLK_DRIVE_LOW;
+
+	writel(reg, &regs->command);
 
 	priv->mode = mode;
 	debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 6c21acda57..8ccc5780c9 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -247,7 +247,7 @@ static int xilinx_spi_set_speed(struct udevice *bus, uint speed)
 
 	priv->freq = speed;
 
-	debug("xilinx_spi_set_speed: regs=%p, mode=%d\n", priv->regs,
+	debug("xilinx_spi_set_speed: regs=%p, speed=%d\n", priv->regs,
 	      priv->freq);
 
 	return 0;
@@ -260,13 +260,13 @@ static int xilinx_spi_set_mode(struct udevice *bus, uint mode)
 	uint32_t spicr;
 
 	spicr = readl(&regs->spicr);
-	if (priv->mode & SPI_LSB_FIRST)
+	if (mode & SPI_LSB_FIRST)
 		spicr |= SPICR_LSB_FIRST;
-	if (priv->mode & SPI_CPHA)
+	if (mode & SPI_CPHA)
 		spicr |= SPICR_CPHA;
-	if (priv->mode & SPI_CPOL)
+	if (mode & SPI_CPOL)
 		spicr |= SPICR_CPOL;
-	if (priv->mode & SPI_LOOP)
+	if (mode & SPI_LOOP)
 		spicr |= SPICR_LOOP;
 
 	writel(spicr, &regs->spicr);
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 310fb69c8d..d370e495cd 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -272,7 +272,8 @@ static int zynq_spi_set_speed(struct udevice *bus, uint speed)
 	writel(confr, &regs->cr);
 	priv->freq = speed;
 
-	debug("zynq_spi_set_speed: regs=%p, mode=%d\n", priv->regs, priv->freq);
+	debug("zynq_spi_set_speed: regs=%p, speed=%d\n",
+	      priv->regs, priv->freq);
 
 	return 0;
 }
@@ -287,9 +288,9 @@ static int zynq_spi_set_mode(struct udevice *bus, uint mode)
 	confr = readl(&regs->cr);
 	confr &= ~(ZYNQ_SPI_CR_CPHA_MASK | ZYNQ_SPI_CR_CPOL_MASK);
 
-	if (priv->mode & SPI_CPHA)
+	if (mode & SPI_CPHA)
 		confr |= ZYNQ_SPI_CR_CPHA_MASK;
-	if (priv->mode & SPI_CPOL)
+	if (mode & SPI_CPOL)
 		confr |= ZYNQ_SPI_CR_CPOL_MASK;
 
 	writel(confr, &regs->cr);
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index 868c51254d..1c74e97c5e 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -419,7 +419,8 @@ void *video_hw_init (void)
 	board_disp_init ();
 #endif
 
-#if defined(CONFIG_SOCRATES) && !(CONFIG_POST & CONFIG_SYS_POST_SYSMON)
+#if (defined(CONFIG_LWMON5) || \
+     defined(CONFIG_SOCRATES)) && !(CONFIG_POST & CONFIG_SYS_POST_SYSMON)
 	/* Lamp on */
 	board_backlight_switch (1);
 #endif
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 9e9cb55069..a007ae8234 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -7,7 +7,7 @@
 
 obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
 obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o
-ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610 ls102xa))
+ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 mx7 vf610))
 obj-y += imx_watchdog.o
 endif
 obj-$(CONFIG_S5P)               += s5p_wdt.o
diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c
index 9a77a54192..0d775956bf 100644
--- a/drivers/watchdog/imx_watchdog.c
+++ b/drivers/watchdog/imx_watchdog.c
@@ -8,19 +8,7 @@
 #include <asm/io.h>
 #include <watchdog.h>
 #include <asm/arch/imx-regs.h>
-
-struct watchdog_regs {
-	u16	wcr;	/* Control */
-	u16	wsr;	/* Service */
-	u16	wrsr;	/* Reset Status */
-};
-
-#define WCR_WDZST	0x01
-#define WCR_WDBG	0x02
-#define WCR_WDE		0x04	/* WDOG enable */
-#define WCR_WDT		0x08
-#define WCR_SRS		0x10
-#define SET_WCR_WT(x)	(x << 8)
+#include <fsl_wdog.h>
 
 #ifdef CONFIG_IMX_WATCHDOG
 void hw_watchdog_reset(void)